DSPIC30F2010 datasheet(3/202 Pages) MICROCHIP

3 / 202 page

DS70118J-page 3

PIC30F2010

High-Performance Modified RISC CPU:

• Modified Harvard architecture

• C compiler optimized instruction set architecture

• 83 base instructions with flexible addressing

modes

• 24-bit wide instructions, 16-bit wide data path

• 12 Kbytes on-chip Flash program space

• 512 bytes on-chip data RAM

• 1 Kbyte nonvolatile data EEPROM

• 16 x 16-bit working register array

• Up to 30 MIPs operation:

- DC to 40 MHz external clock input

- 4 MHz-10 MHz oscillator input with

PLL active (4x, 8x, 16x)

• 27 interrupt sources

• Three external interrupt sources

• Eight user-selectable priority levels for each interrupt

• Four processor exceptions and software traps

DSP Engine Features:

• Modulo and Bit-Reversed modes

• Two 40-bit wide accumulators with optional

saturation logic

• 17-bit x 17-bit single-cycle hardware fractional/

integer multiplier

• Single-cycle Multiply-Accumulate (MAC)

operation

• 40-stage Barrel Shifter

• Dual data fetch

Peripheral Features:

• High current sink/source I/O pins: 25 mA/25 mA

• Three 16-bit timers/counters; optionally pair up

16-bit timers into 32-bit timer modules

• Four 16-bit capture input functions

• Two 16-bit compare/PWM output functions

- Dual Compare mode available

• 3-wire SPI modules (supports 4 Frame modes)

•I2CTM module supports Multi-Master/Slave mode

and 7-bit/10-bit addressing

• Addressable UART modules with FIFO buffers

Motor Control PWM Module Features:

• Six PWM output channels

- Complementary or Independent Output

modes

- Edge and Center-Aligned modes

• Four duty cycle generators

• Dedicated time base with four modes

• Programmable output polarity

• Dead-time control for Complementary mode

• Manual output control

• Trigger for synchronized A/D conversions

Quadrature Encoder Interface Module

Features:

• Phase A, Phase B and Index Pulse input

• 16-bit up/down position counter

• Count direction status

• Position Measurement (x2 and x4) mode

• Programmable digital noise filters on inputs

• Alternate 16-bit Timer/Counter mode

• Interrupt on position counter rollover/underflow

Analog Features:

• 10-bit Analog-to-Digital Converter (ADC) with:

- 1 Msps (for 10-bit A/D) conversion rate

- Six input channels

- Conversion available during Sleep and Idle

• Programmable Brown-out Reset

Note:

This data sheet summarizes features of

this group of dsPIC30F devices and is not

intended to be a complete reference

source. For more information on the CPU,

peripherals,

descriptions

and

general device functionality, refer to the

“dsPIC30F Family Reference Manual”

(DS70046). For more information on the

device instruction set and programming,

refer to the “16-bit MCU and DSC Pro-

grammer’s

Reference

Manual”

(DS70157).

High-Performance, 16-bit Digital Signal Controller

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