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352 датащи(PDF) 28 Page - Intel Corporation |
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352 датащи(HTML) 28 Page - Intel Corporation |
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28 / 95 page ![]() Electrical Specifications 28 Datasheet 2.6.3.1 GTL+ Front Side Bus Specifications In most cases, termination resistors are not required as these are integrated into the processor silicon. See Table 8 for details on which GTL+ signals do not include on-die termination. Valid high and low levels are determined by the input buffers by comparing with a reference voltage called GTLREF. Table 16 lists the GTLREF specifications. The GTL+ Reference voltage (GTLREF) should be generated on the system board using high precision voltage divider circuits. Table 16. GTL+ Bus Voltage Definitions Symbol Parameter Min Typ Max Units Notes1 NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. GTLREF_PU GTLREF pull up resistor 124 * 0.99 124 124 * 1.01 Ω 2,3 2. GTLREF is to be generated from VTT by a voltage divider of 1% resistors (one divider for each GTLREF land). 3. For Intel 865 Express chipset LGA775 boards only, the GTLREF_PU should be 49.9 Ω 1%, and the GTLREF_PD should be 100 Ω 1%. GTLREF_PD GTLREF pull down resistor 210 * 0.99 210 210 * 1.01 Ω 2,3 RPULLUP On die pull-up for BOOTSELECT signal 500 — 5000 Ω 4 4. These pull-ups are to VTT. R TT 60 Ω Platform Termination Resistance 51 60 66 Ω 5 5. RTT is the on-die termination resistance measured at VTT/2 of the GTL+ output driver. The IMPSEL land is used to select a 50 Ω or 60 Ω buffer and RTT value. 50 Ω Platform Termination Resistance 39 50 55 Ω 5 COMP[1:0] 60 Ω Platform Termination COMP Resistance 59.8 60.4 61 Ω 6 6. COMP resistance must be provided on the system board with 1% resistors. COMP[1:0] resistors are to VSS. COMP[5:4] resistors are to VTT. 50 Ω Platform Termination COMP Resistance 49.9 * 0.99 49.9 49.9 * 1.01 Ω 6 COMP[5:4] 60 Ω Platform Termination COMP Resistance 59.8 60.4 61 Ω 6 50 Ω Platform Termination COMP Resistance 49.9 * 0.99 49.9 49.9 * 1.01 Ω 6 |
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