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P89LPC915FDH датащи(PDF) 67 Page - NXP Semiconductors |
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P89LPC915FDH датащи(HTML) 67 Page - NXP Semiconductors |
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67 / 75 page ![]() P89LPC915_916_917_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 15 December 2009 67 of 75 NXP Semiconductors P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core 13. Other characteristics 13.1 Comparator electrical characteristics [1] This parameter is characterized, but not tested in production. 13.2 ADC electrical characteristics Table 19. Comparator electrical characteristics VDD = 2.4 V to 3.6 V, unless otherwise specified. Tamb = −40 °C to +85 °C, or −40 °C to +125 °C (see Table 3 on page 3), unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit VIO input offset voltage - - ±20 mV VIC common mode input voltage 0 - VDD − 0.3 V CMRR common mode rejection ratio [1] -- −50 dB tres(tot) total response time - 250 500 ns t(CE-OV) chip enable to output valid time - - 10 µs ILI input leakage current 0 < VI <VDD -- ±10 µA Table 20. ADC electrical characteristics VDD = 2.4 V to 3.6 V, unless otherwise specified. Tamb = −40 °C to +85 °C, or −40 °C to +125 °C (see Table 3 on page 3), unless otherwise specified. All limits valid for an external source impedance of less than 10 k Ω. Symbol Parameter Conditions Min Typ Max Unit VIA analog input voltage VSS − 0.2 - VSS + 0.2 V Cia analog input capacitance - - 15 pF ED differential linearity error - - ±1 LSB EL(adj) integral non-linearity - - ±1 LSB EO offset error - - ±2 LSB EG gain error - - ±1% Eu(tot) total unadjusted error - - ±2 LSB MCTC channel-to-channel matching - - ±1 LSB αct(port) crosstalk between port inputs 0 kHz to 100 kHz - - −60 dB SRin input slew rate - - 100 V/ms Tcy(ADC) ADC clock cycle 111 - 2000 ns tADC conversion time A/D enabled - - 13Tcy(ADC) ns |
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