AD9553SLASHPCBZ datasheet(37/44 Pages) AD

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AD9553

Rev. 0 | Page 37 of 44

Input Receiver and Band Gap Control (Register 0x1A)

Table 32.

Address

Bit

Bit Name

Description

0x1A

Receiver reset

Input receiver reset control. This is an autoclearing bit.

0 = normal operation (default).

1 = resets the reference input hardware (detectors, dividers, switchover control,

crystal oscillator and its associated frequency doubler).

[6:2]

Band gap voltage adjust

Controls the band gap voltage setting from minimum (00000) to maximum (11111).

Default is 00000.

The band gap voltage adjust bits are ineffective unless Register 0x1A[0] = 1.

Unused

Unused.

Enable SPI control of band

gap voltage

Enables functionality of Register 0x1A[6:2].

0 = the device automatically selects receiver band gap voltage (default).

1 = Register 0x1A[6:2] defines the receiver band gap voltage.

XTAL Control (Register 0x1B to Register 0x1E)

Table 33.

Address

Bit

Bit Name

Description

0x1B

Disable SPI control of XTAL

tuning capacitance

Disables functionality of Register 0x1B[5:0].

0 = tuning capacitance defined by Register 0x1B[5:0].

1 = the device automatically selects XTAL tuning capacitance (default).

Unused

When programming this register write a Logic 0 to this bit.

[5:0]

XTAL tuning capacitor control

Capacitance value coded as inverted binary (0.25 pF per bit); that is, 111111 is 0 pF,

111110 is 0.25 pF, and so on. The default value, 000000, is 15.75 pF.

The XTAL tuning capacitor bits are ineffective unless Register 0x1B[7] = 0.

0x1C

[7:0]

Unused

Unused.

0x1D

[7:0]

Unused

Unused.

0x1E

[7:0]

Unused

Unused.

REFA Frequency Control (Register 0x1F to Register 0x22)

Table 34.

Address

Bit

Bit Name

Description

0x1F

[7:0]

REFA divider (RA)

Bits[13:6] of the 14-bit REFA divider.

0x20

[7:2]

REFA divider (RA)

Bits[5:0] of the 14-bit REFA divider (default: RA = 2048 decimal).

The REFA divider bits are ineffective unless Register 0x20[1] = 1.

Enable SPI control of RA

Enables SPI port control of the REFA divider value (RA).

0 = The A[3:0] pins define RA per Table 14 (default).

1 = The 14-bit value in the REFA divider register defines RA.

Unused

Unused.

0x21

Enable SPI control of x2A

Enables SPI control of the REFA 2x frequency multiplier (x2A) per 0x21[6].

0 = the device automatically selects x2A per Table 14 (default).

1 = Register 0x21[6] controls the selection of x2A.

Select x2A

Selects x2A.

0 = bypass x2A (default).

1 = select x2A.

This bit is ineffective unless Register 0x21[7] = 1.

Enable SPI control of /5A

Enables SPI control of the /5A prescaler per 0x21[4].

0 = the device automatically selects /5A per Table 14 (default).

1 = Register 0x21[4] controls the selection of /5A.

Select /5A

Selects /5A.

0 = bypass /5A (default).

1 = select /5A.

This bit is ineffective unless Register 0x21[5] = 1.

[3:0]

Unused

Unused.

0x22

[7:0]

Unused

Unused.

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