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UPSD3233 датащи(PDF) 124 Page - STMicroelectronics

номер детали UPSD3233
подробное описание детали  Flash Programmable System Devices with 8032 Microcontroller Core
PDF  170 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3233 датащи(HTML) 124 Page - STMicroelectronics

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uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
124/170
Ports A and B – Functionality and Structure
Ports A and B have similar functionality and struc-
ture, as shown in Figure 65. The two ports can be
configured to perform one or more of the following
functions:
–
MCU I/O Mode
–
CPLD Output – Macrocells McellAB7-
McellAB0 can be connected to Port A or Port
B. McellBC7-McellBC0 can be connected to
Port B or Port C.
–
CPLD Input – Via the Input Macrocells (IMC).
–
Latched Address output – Provide latched
address output as per Table 94., page 121.
–
Open Drain/Slew Rate – pins PA3-PA0 and
PB3-PB0 can be configured to fast slew rate,
pins PA7-PA4 and PB7-PB4 can be
configured to Open Drain Mode.
–
Peripheral Mode – Port A only (80-pin
package)
Figure 65. Port A and Port B Structure
DATA OUT
REG.
DQ
D
G
Q
DQ
DQ
WR
WR
WR
ADDRESS
MACROCELL OUTPUTS
ENABLE PRODUCT TERM (.OE)
ALE
READ MUX
P
D
B
CPLD - INPUT
CONTROL REG.
DIR REG.
INPUT
MACROCELL
ENABLE OUT
DATA IN
OUTPUT
SELECT
OUTPUT
MUX
PORT
A OR B PIN
DATA OUT
ADDRESS
A[ 7:0]
AI06605



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