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AD9992BBCZ датащи(PDF) 85 Page - Analog Devices |
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AD9992BBCZ датащи(HTML) 85 Page - Analog Devices |
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85 / 92 page ![]() AD9992 Rev. C | Page 85 of 92 Address Data Bits Default Value Update Type Mnemonic Description [2] 0 VD/SG SUBCKHP_TOG1_13 Bit 13 for SUBCK HP Toggle 1. For 14-bit H-counter mode. [3] 0 VD/SG SUBCKHP_TOG2_13 Bit 13 for SUBCK HP Toggle 2. For 14-bit H-counter mode. Table 38. Update Control Registers Address Data Bits Default Value Update Mnemonic Description 0xB0 [15:0] 1803 SCK AFE_UPDT_SCK Each bit corresponds to one address location. AFE_UPDT_SCK [0] = 1, update Address 0x00 on SL rising edge. AFE_UPDT_SCK [1] = 1, update Address 0x01 on SL rising edge. … AFE_UPDT_SCK [15] = 1, update Address 0x0F on SL rising edge. 0xB1 [15:0] E7FC SCK AFE_UPDT_VD Each bit corresponds to one address location. AFE_UPDT_VD [0] = 1, update Address 0x00 on VD rising edge. AFE_UPDT_VD [1] = 1, update Address 0x01 on VD rising edge. … AFE_UPDT_VD [15] = 1, update Address 0x0F on VD rising edge. 0xB2 [15:0] F8FD SCK MISC_UPDT_SCK Enable SCK update of miscellaneous registers, Address 0x10 to Address 0x1F. 0xB3 [15:0] 0702 SCK MISC_UPDT_VD Enable VD update of miscellaneous registers, Address 0x10 to Address 0x1F. 0xB4 [15:0] FFF9 SCK VDHD_UPDT_SCK Enable SCK update of VDHD registers, Address 0x20 to Address 0x2F. 0xB5 [15:0] 0006 SCK VDHD_UPDT_VD Enable VD update of VDHD registers, Address 0x20 to Address 0x2F. Table 39. Extra Registers Address Data Bits Default Value Update Mnemonic Description 0xD4 [0] 0 SCK TEST Test mode only. Set to 0. [1] 0 GPO_INT_EN Allow observation of internal signals at GPO5 to GPO8 outputs: GPO5: OUTCONTROL. GPO6: HBLK. GPO7: CLPOB. GPO8: PBLK. [9:2] 0 TEST Test mode only. Set to 0. 0xD7 [0] 0 SCK TEST Test mode only. Set to 0. [1] 0 XV24_SWAP Set to 1 to change the V-driver output configuration so that XV15 is output on the XV24 output pin. Useful with special vertical sequence alternation mode when the XV24 register is reserved for pattern selection. 0xD8 [27:0] 0 SCK START Recommended start-up register. Should be set to 0x888. |
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