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7641 датащи(PDF) 59 Page - Renesas Technology Corp |
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7641 датащи(HTML) 59 Page - Renesas Technology Corp |
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59 / 385 page ![]() Rev.2.00 Aug 28, 2006 page 42 of 113 7641 Group REJ09B0336-0200 HARDWARE FUNCTIONAL DESCRIPTION φ OUT SYNCOUT RD WR A5 ADL185 DMA data ADL2 ADL2, 00 DMA desti- nation add. DMA source add. PC + 2 ADL1, 00 PC + 1 PCPC + 3 PC + 4 LDA $zz STA $zz DMA transfer STA $zz (last 2 cycles) Data DMAOUT (Port P33) Address Data Transfer request source (“L” active) Transfer request source sampling Reset of transfer request source sampling Next instruction Op code 3 Data DMA data Fig. 33 Timing chart for cycle steal transfer caused by hardware-related transfer request 3C 18 41 90 42, 00 PC + 2 PC + 1 PCPC + 3 PC + 4 LDM #$90, $41 PC + 6 PC + 5 φ OUT SYNCOUT RD WR DMAOUT (Port P33) Address Data Transfer request source (“L” active) Transfer request source sampling Reset of transfer request source sampling Next instruction 1 cycle instruction 1 cycle instruction 1 cycle instruction DMA transfer DMA data DMA desti- nation add. DMA source add. Op code 2 DMA data Op code 3 Op code 4 Op code 6 Fig. 34 Timing chart for cycle steal transfer caused by software trigger transfer request |
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