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HD6432351 датащи(PDF) 107 Page - Renesas Technology Corp

номер детали HD6432351
подробное описание детали  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
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HD6432351 датащи(HTML) 107 Page - Renesas Technology Corp

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Section 3 MCU Operating Modes
Rev. 3.00 Sep 15, 2006 page 73 of 988
REJ09B0330-0300
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select the control
mode of the interrupt controller. For details of the interrupt control modes, see section 5.4.1,
Interrupt Control Modes and Interrupt Operation.
Bit 5
INTM1
Bit 4
INTM0
Interrupt Control
Mode
Description
0
0
0
Control of interrupts by I bit
(Initial value)
1
—
Setting prohibited
1
0
2
Control of interrupts by I2 to I0 bits and IPR
1
—
Setting prohibited
Bit 3—NMI Edge Select (NMIEG): Selects the valid edge of the NMI interrupt input.
Bit 3
NMIEG
Description
0
An interrupt is requested at the falling edge of NMI input
(Initial value)
1
An interrupt is requested at the rising edge of NMI input
Bit 2—Reserved: Read-only bit, always read as 0.
Bit 1—Reserved: Only 0 should be written to this bit.
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized when the reset status is released. It is not initialized in software standby mode.
Bit 0
RAME
Description
0
On-chip RAM is disabled
1
On-chip RAM is enabled
(Initial value)



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