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M32C/8A датащи(PDF) 220 Page - Renesas Technology Corp |
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M32C/8A датащи(HTML) 220 Page - Renesas Technology Corp |
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220 / 372 page ![]() M32C/8A Group 17. Serial Interfaces Rev.1.00 Jul 15, 2007 Page 203 of 352 REJ09B0385-0100 Figure 17.7 U0C0 to U4C0 Registers b7 b6 b5 b4 b1 b2 b3 Symbol U0C0 to U2C0 U3C0, U4C0 Address 036Ch, 02ECh, 033Ch 032Ch, 02FCh After Reset 0000 1000b 0000 1000b b0 Function Bit Symbol Bit Name RW CRS CLK1 CLK0 NCH CKPOL 0: Data in the transmit shift register (during transmit operation) 1: No data in the transmit shift register (transmit operation is completed) Transmit shift register empty flag CLK polarity select bit UiBRG count source select bits(1) CRD TXEPT 0: CTS function enabled 1: CTS function disabled 0: Transmit data output at the falling edge and receive data input at the rising edge of the serial clock 1: Transmit data output at the rising edge and receive data input at the falling edge of the serial clock CTS function disable bit 0: TXDi/SDAi and SCLi are CMOS output ports 1: TXDi/SDAi and SCLi are N-channel open drain output ports Data output select bit3) Bit order select bit(4) 0 : LSB first 1 : MSB first UFORM UARTi Transmit/Receive Control Register 0 (i = 0 to 4) RW RW RW RO RW RW RW RW CTS function select bit Enabled when CRD = 0 0: CTS function selected 1: CTS function not selected b1 b0 0 0: f1 selected 0 1: f8 selected 1 0: f2n selected(2) 1 1: Do not set to this value NOTES: 1. Set the UiBRG register after setting bits CLK1 and CLK0. 2. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15). To select f2n, set the CST bit in the TCSPR register to 1 before setting bits CLK1 and CLK0 to 10b. 3. P7_0/TXD2, P7_1/SCL2 are N-channel open drain output ports. They cannot be selected as CMOS output ports. 4. The UFORM bit is enabled when bits SMD2 to SMD0 in the UiMR register are set to 001b (clock synchronous mode) or 101b (UART mode, 8-bit data length). Set the UFORM bit to 1 when bits SMD2 to SMD0 are set to 010b (I 2C mode), or to 0 when bits SMD2 to SMD0 are set to 100b (UART mode, 7-bit data length) or 110b (UART mode, 9-bit data length). |
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