M32CSLASH8A datasheet(83/372 Pages) RENESAS

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M32C/8A Group

8. Bus

Rev.1.00

Jul 15, 2007

Page 66 of 352

REJ09B0385-0100

8.3

Page Mode Control Function

The page mode control function allows high-speed read access to the external memory compatible with the page

mode control. While the MCU accesses data within the eight-byte block of consecutive addresses which have the

same 21 high-order bits, less cycles are required for the subsequent bus accesses than the first bus access.

The EWCRi register (i = 0 to 3) determines how many wait states are inserted for the first bus access. Registers

PWCR0 and PWCR1 determine how many wait states are inserted for the subsequent bus accesses. Use the

following procedure to enable the page mode control.

(1) Set bits EWCRi4 to EWCRi0 in the EWCRi register.

(2) Set bits PWCRj02 to PWCRj00 and bits PWCRj06 to PWCRj04 in the PWCRj register (j = 0, 1).

(3) Set bits PWCRj03 and PWCRj07 to 1 (page mode control enabled).

When using the page mode control function, access all the external spaces using page mode control. It is not

allowed to combine the page mode controlled access and the normal access to external spaces.

Set bits PM05 and PM04 to 00b (multiplexed bus is not used). The page mode control function and multiplexed

bus cannot be used at the same time.

Figure 8.12 and 8.13 show registers PWCR0 and PWCR1. Figure 8.14 shows a diagram of external bus timing with

page mode function.

Figure 8.12

PWCR0 Register

b7 b6 b5 b4

Page Mode Wait Control Register 0

Bit Symbol

Bit Name

PWCR000

NOTE:

1. When page mode control is enabled, set the EWCRi6 bit in the EWCRi register (i = 0 to 3) to 0 (add no recovery

cycle when accessing external space i ).

Function

External space 0

subsequent access

wait select bits

PWCR001

PWCR002

b2 b1 b0

0 0 1: 1φ + 1φ

0 1 0: 1φ + 2φ

0 1 1: 1φ + 3φ

1 0 0: 1φ + 4φ

Do not set to values other than the above.

PWCR003

PWCR005

PWCR004

PWCR006

PWCR007

External space 0

page mode control enable bit

0: Page mode control disabled

1: Page mode control enabled(1)

External space 1

subsequent access

wait select bits

b6 b5 b4

0 0 1: 1φ + 1φ

0 1 0: 1φ + 2φ

0 1 1: 1φ + 3φ

1 0 0: 1φ + 4φ

Do not set to values other than the above.

External space 1

page mode control enable bit

0: Page mode control disabled

1: Page mode control enabled(1)

Symbol

PWCR0

Address

004Ch

After Reset

0001 0001b

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