M16CSLASH29 datasheet(234/499 Pages) RENESAS

234 / 499 page

14. Serial I/O

page 210

14.1.5 Special Mode 3 (IEBus mode)(UART2)

In this mode, one bit in the IEBus is approximated with one byte of UART mode waveform.

Table 14.17

lists the registers used in IEBus mode and the register values set. Figure 14.30 shows the

functions of bus collision detect function related bits.

If the TxD2 pin output level and RxD2 pin input level do not match, a UART2 bus collision detect interrupt

request is generated.

Table 14.17 Registers to Be Used and Settings in IEBus Mode

Bit

Function

U2TB

0 to 8

Set transmission data

U2RB(1)

0 to 8

Reception data can be read

OER,FER,PER,SUM Error flag

U2BRG

0 to 7

Set bit rate

U2MR

SMD2 to SMD0

Set to 1102

CKDIR

Select the internal clock or external clock

STPS

Set to 0

PRY

Invalid because PRYE is set to 0

PRYE

Set to 0

IOPOL

Select the TxD/RxD input/output polarity

U2C0

CLK1, CLK0

Select the count source for the U2BRG register

CRS

Invalid because CRDis set to 1

TXEPT

Transmit register empty flag

CRD

Set to 1

NCH

Select TxD2 pin output mode

CKPOL

Set to 0

UFORM

Set to 0

U2C1

Set this bit to 1 to enable transmission

Transmit buffer empty flag

Set this bit to 1 to enable reception

Reception complete flag

U2IRS

Select the source of UART2 transmit interrupt

U2RRM,

Set to 0

U2LCH, U2ERE

U2SMR

0 to 3, 7

Set to 0

ABSCS

Select the sampling timing at which to detect a bus collision

ACSE

Set this bit to 1 to use the auto clear function of transmit enable bit

SSS

Select the transmit start condition

U2SMR2

0 to 7

Set to 0

U2SMR3

0 to 7

Set to 0

U2SMR4

0 to 7

Set to 0

NOTE:

1. Not all register bits are described above. Set those bits to 0 when writing to the registers in IEBus mode.

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