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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M16C/29 датащи(PDF) 81 Page - Renesas Technology Corp |
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M16C/29 датащи(HTML) 81 Page - Renesas Technology Corp |
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81 / 499 page  7. Clock Generation Circuit page 57 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R p u o r G 9 2 / C 6 1 M Figure 7.10 Procedure to Use PLL Clock as CPU Clock Source START Set the CM07 bit to 0 (main clock), bits CM17 and CM16 to 002(main clock undivided), and the CM06 bit to 0 (bits CM17 and CM16 enabled). (1) Set bits PLC02 to PLC00 (multiplying factor). (To select a 16 MHz or higher PLL clock) Set the PM20 bit to 0 (2-wait states). Set the PLC07 bit to 1 (PLL operation). Wait until the PLL clock becomes stable (tsu(PLL)). Set the CM11 bit to 1 (PLL clock for the CPU clock source). END NOTE: 1. PLL operation mode can be entered from high speed mode. |
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