M16CSLASH29 datasheet(98/499 Pages) RENESAS

98 / 499 page

9. Interrupts

page 74

Table 9.2 Relocatable Vector Tables

9.2.2 Relocatable Vector Tables

The 256 bytes beginning with the start address set in the INTB register comprise a reloacatable vector

table area. Table 9.2 lists the relocatable vector tables. Setting an even address in the INTB register

results in the interrupt sequence being executed faster than in the case of odd addresses.

Software interrupt

number

Reference

Vector address (1)

Address (L) to address (H)

Interrupt source

BRK instruction(2)

INT3

SI/O3, INT4(5)

SI/O4, INT5(5)

IC/OC interrupt 1, I2C bus interface(4)

IC/OC interrupt 0

DMA0

DMA1

A/D, Key input interrupt (7)

UART0 transmit

UART0 receive

UART1 transmit

UART1 receive

Timer A0

Timer A1

Timer A2

Timer A3

Timer A4

Timer B0

Timer B1

Timer B2

INT0

INT1

INT2

Software interrupt(2)

UART 2 bus collision detection (6)

UART2 transmit, NACK2 (8)

UART2 receive, ACK2 (8)

IC/OC base timer, SCL/SDA(4)

M16C/60, M16C/20

series software

manual

INT interrupt

Timer S

Multi-Master I2C bus

interface

CAN module

INT interrupt

Serial I/O

DMAC

A/D convertor,

Key input interrupt

Serial I/O

Timer

INT interrupt

M16C/60, M16C/20

series software

manual

CAN0 wakeup(3)

+0 to +3 (000016 to 000316)

+44 to +47 (002C 16 to 002F16)

+48 to +51 (003016 to 003316)

+52 to +55 (003416 to 003716)

+56 to +59 (003816 to 003B16)

+68 to +71 (004416 to 004716)

+72 to +75 (004816 to 004B16)

+76 to +79 (004C 16 to 004F16)

+80 to +83 (005016 to 005316)

+84 to +87 (005416 to 005716)

+88 to +91 (005816 to 005B16)

+92 to +95 (005C 16 to 005F16)

+96 to +99 (006016 to 006316)

+100 to +103 (006416 to 006716)

+104 to +107 (0068 16 to 006B16)

+108 to +111 (006C 16 to 006F16)

+112 to +115 (007016 to 007316)

+116 to +119 (007416 to 007716)

+120 to +123 (0078 16 to 007B16)

+124 to +127 (007C 16 to 007F16)

+128 to +131 (008016 to 008316)

+252 to +255 (00FC 16 to 00FF16)

+40 to +43 (002816 to 002B16)

+60 to +63 (003C 16 to 003F16)

+64 to +67 (004016 to 004316)

+20 to +23 (001416 to 001716)

+24 to +27 (001816 to 001B16)

+28 to +31 (001C 16 to 001F16)

+32 to +35 (002016 to 002316)

+16 to +19 (001016 to 001316)

+36 to +39 (002416 to 002716)

+4 to +7 (000416 to 000716)

+8 to +11 (000816 to 000B16)

+12 to +15 (000C 16 to 000F16)

CAN0 receive completion

CAN0 transmit completion

Timer S

Serial I/O

CAN0 state, error

CAN module

NOTES:

1. Address relative to address in INTB.

2. These interrupts cannot be disabled using the I flag.

3. Set the IFSR22 bit in the IFSR register to 0.

4. Use bits IFSR26 and IFSR27 in the IFSR2A register to select.

5. Use bits IFSR6 and IFSR7 in the IFSR register to select.

6. Bus collision detection: In IEBus mode, this bus collision detection constitutes the cause of an interrupt. In I2C bus

mode, however, a start condition or a stop condition detection constitutes the cause of an interrupt.

7. Use the IFSR21 bit in the IFSR2A register to select.

8. During I2C bus mode, NACK and ACK interrupts comprise the interrupt source.

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