7547 datasheet(64/91 Pages) RENESAS

64 / 91 page

7547 Group

Rev.1.21

Nov 15, 2006

page 64 of 89

REJ03B0156-0121

NOTES ON USE

Countermeasures against noise

1. Shortest wiring length

(1) Package

Select the smallest possible package to make the total wiring

length short.

The wiring length depends on a microcomputer package. Use of a

small package, for example QFP and not DIP, makes the total wir-

ing length short to reduce influence of noise.

(3) Wiring for clock input/output pins

• Make the length of wiring which is connected to clock I/O pins as

short as possible.

• Make the length of wiring (within 20 mm) across the grounding

lead of a capacitor which is connected to an oscillator and the

VSS pin of a microcomputer as short as possible.

• Separate the VSS pattern only for oscillation from other VSS pat-

terns.

If noise enters clock I/O pins, clock waveforms may be deformed.

This may cause a program failure or program runaway. Also, if a

potential difference is caused by the noise between the VSS level

of a microcomputer and the VSS level of an oscillator, the correct

clock will not be input in the microcomputer.

(2) Wiring for RESET pin

Make the length of wiring which is connected to the RESET pin as

short as possible. Especially, connect a capacitor across the

RESET pin and the VSS pin with the shortest possible wiring

(within 20mm).

The width of a pulse input into the RESET pin is determined by the

timing necessary conditions. If noise having a shorter pulse width

than the standard is input to the RESET pin, the reset is released

before the internal state of the microcomputer is completely initial-

ized. This may cause a program runaway.

Fig. 84 Wiring for clock I/O pins

Fig. 82 Selection of packages

DIP

SDIP

SOP

QFP

Fig. 83 Wiring for the RESET pin

RESET

Reset

circuit

Noise

VSS

Reset

circuit

VSS

RESET

VSS

N.G.

O.K.

Noise

XIN

XOUT

VSS

XIN

XOUT

VSS

N.G.

O.K.

(4) Wiring to VPP pin

Connect VPP pin to a GND pattern at the shortest distance.

The GND pattern is required to be as close as possible to the

GND supplied to VSS.

In order to improve the noise reduction, to connect a 5 k

Ω resistor

serially to the VPP pin - GND line may be valid.

As well as the above-mentioned, in this case, connect to a GND

pattern at the shortest distance. The GND pattern is required to be

as close as possible to the GND supplied to VSS.

The VPP pin of the QzROM is the power source input pin for the

built-in QzROM. When programming in the built-in QzROM, the

impedance of the VPP pin is low to allow the electric current for

writing flow into the QzROM. Because of this, noise can enter eas-

ily. If noise enters the VPP pin, abnormal instruction codes or data

are read from the built-in QzROM, which may cause a program

runaway.

Fig. 85 Wiring for the VPP pin of the QzPROM

About 5k

Ω

VSS

The shortest

CNVSS/VPP

(Note)

Note: This indicates pin.

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