38D2 datasheet(80/136 Pages) RENESAS

80 / 136 page

Rev.3.02

Apr 10, 2008

Page 80 of 131

REJ03B0177-0302

38D2 Group

Functions To Inhibit Rewriting Flash Memory Version

To prevent the contents of internal flash memory from being read

out or rewritten easily, this MCU incorporates a ROM code

protect function for use in parallel I/O mode and an ID code

check function for use in standard serial I/O mode.

• ROM Code Protect Function

The ROM code protect function is the function to inhibit reading

out or modifying the contents of internal flash memory by using

the ROM code protect control address (address FFDB16) in

parallel I/O mode. Figure 78 shows the ROM code protect

control address (address FFDB16). (This address exists in the

User ROM area.)

If one or both of the pair of ROM code protect bits is set to “0”,

the ROM code protect is turned on, so that the contents of

internal flash memory are protected against readout and

modification. The ROM code protect is implemented in two

levels. If level 2 is selected, the flash memory is protected even

against readout by a shipment inspection LSI tester, etc. When an

attempt is made to select both level 1 and level 2, level 2 is

selected by default.

If both of the two ROM code protect reset bits are set to “00”, the

ROM code protect is turned off, so that the contents of internal

flash memory can be readout or modified. Once the ROM code

protect is turned on, the contents of the ROM code protect reset

bits cannot be modified in parallel I/O mode. Use standard serial

I/O mode or other modes to rewrite the contents of the ROM

code protect disable bits.

Rewriting of only the ROM code protect control address (address

FFDB16) cannot be performed. When rewriting the ROM code

protect reset bit, rewrite the whole user ROM area (block 0)

containing the ROM code protect control address.

Fig 78. Structure of ROM code protect control address

ROM code protect control address (address FFDB16)

ROMCP (FF16 when shipped)

Reserved bits (“1” at read/write)

ROM code protect level 2 set bits (ROMCP2)(1, 2)

b3b2

0 0: Protect enabled

0 1: Protect enabled

1 0: Protect enabled

1 1: Protect disabled

ROM code protect reset bits (ROMCR)(3)

b5b4

0 0: Protect removed

0 1: Protect set bits effective

1 0: Protect set bits effective

1 1: Protect set bits effective

ROM code protect level 1 set bits (ROMCP1)(1)

b7b6

0 0: Protect enabled

0 1: Protect enabled

1 0: Protect enabled

1 1: Protect disabled

Notes 1: When ROM code protect is turned on, the internal flash memory is protected

against readout or modification in parallel I/O mode.

2: When ROM code protect level 2 is turned on, ROM code readout by a shipment

inspection LSI tester, etc. also is inhibited.

3: The ROM code protect reset bits can be used to turn off ROM code protect level

1 and ROM code protect level 2.

However, no change can be made in parallel I/O mode. Use serial I/O mode or

other modes to change settings.

38D2 датащи(PDF) 80 Page - Renesas Technology Corp

38D2 датащи(HTML) 80 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL