38D2 datasheet(63/136 Pages) RENESAS

63 / 136 page

Rev.3.02

Apr 10, 2008

Page 63 of 131

REJ03B0177-0302

38D2 Group

Fig. 62 State transitions of system clock

Frequency/2 mode

CM4

XIN oscillation (frequency/2)

XCIN oscillation

OCO oscillation or stop

φ =f(XIN)/2

CM7=0

CM6=0

CM5=0

CM4=1

CM3=0 CM8=*

Frequency/8 mode

CM4

CM5

XIN stop

XCIN oscillation

OCO stop

φ =f(XCIN)/2

CM7=1 (invalid)

CM6=1 (invalid)

CM5=1

CM4=1

CM3=1 CM8=1

CM5

(CM7)

CM3, CM8

(6)

On-chip oscillator mode

Low-speed mode

(6)

CM7

(6)

CM7

XIN oscillation

XCIN oscillation

OCO stop

φ =f(XCIN)/2

CM7=0 (invalid)

CM6=1 (invalid)

CM5=0

CM4=1

CM3=1 CM8=1

XIN stop

XCIN oscillation

OCO oscillation

φ =f(OCO)/32

CM7=1

CM6=1

CM5=1

CM4=1

CM3=0 CM8=0

XIN oscillation

XCIN oscillation

OCO oscillation

φ =f(OCO)/32

CM7=1

CM6=1

CM5=0

CM4=1

CM3=0 CM8=0

XIN oscillation

XCIN stop

OCO oscillation

φ =f(OCO)/32

CM7=1

CM6=1

CM5=0

CM4=0

CM3=0 CM8=0

XIN stop

XCIN stop

OCO oscillation

φ =f(OCO)/32

CM7=1

CM6=1

CM5=1

CM4=0

CM3=0 CM8=0

CM3, CM7,

CM8

(6)

CM4

XIN oscillation (frequency/8)

XCIN oscillation

OCO oscillation or stop

φ =f(XIN)/8

CM7=0

CM6=1

CM5=0

CM4=1

CM3=0 CM8=*

XIN oscillation (frequency/8)

XCIN stop

OCO oscillation or stop

φ =f(XIN)/8

CM7=0

CM6=1

CM5=0

CM4=0

CM3=0 CM8=*

CM6

Reset release

Frequency/4 mode

CM4

XIN oscillation (frequency/4)

XCIN oscillation

OCO oscillation or stop

φ =f(XIN)/4

CM7=1

CM6=0

CM5=0

CM4=1

CM3=0 CM8=*

XIN oscillation

XCIN oscillation

OCO stop

φ =f(XCIN)/2

CM7=0 (invalid)

CM6=0 (invalid)

CM5=0

CM4=1

CM3=1 CM8=1

XIN oscillation

XCIN oscillation

OCO stop

φ =f(XCIN)/2

CM7=1 (invalid)

CM6=0 (invalid)

CM5=0

CM4=1

CM3=1 CM8=1

CM6

XIN oscillation (frequency/2)

XCIN stop

OCO oscillation or stop

φ =f(XIN)/2

CM7=0

CM6=0

CM5=0

CM4=0

CM3=0 CM8=*

XIN oscillation (frequency/4)

XCIN stop

OCO oscillation or stop

φ =f(XIN)/4

CM7=1

CM6=0

CM5=0

CM4=0

CM3=0 CM8=*

* : The OCO oscillating at “0”; the OCO stopped at “1”.

CM6

CM7

CM3

CM6

CM7

CM3

CM6

(CM7)

CM6

CM5

(CM7)

CM6

CM5

CM3

Notes 1: Switchthe mode by the arrows shownbetween themodeblocks.

Theall modescan be switched to thestopmodeor the wait mode.

2: Timer and LCD operate in the wait mode. System is returned to the

source mode when the wait mode is ended.

3: The CM4 value is retained in the stop mode. When the stop mode is

ended, the operation mode varies as follows:

In the QzROM version: Mode set by the OSCSEL pin state

In the flash memory version: On-chip oscillator mode

The input level applied to the OSCSEL pin is determined when executing

the STP instruction.

4: Before executing the STP instruction, set the values to generate the

wait time required for oscillation stabilization to timer 1 and timer 2, and

set to "0" (interrupts disabled) to the interrupt enable bits of timer 1

and timer 2.

5: Execute the transition after the oscillation used in the destination mode

is stabilized.

6: When system goes to on-chip oscillator mode, the oscillation stabilizing

wait time is not needed.

7: The on-chip oscillator can be stopped in all kinds of state of frequency/

2,4 mode.

8:In all XIN mode, stop of on-chip oscillator is enabled.

9: The example assumes that 8 MHz is being applied to the XIN pin and 32

kHz to the XCIN pin. f(OCO) indicates the oscillation frequency of on-

chip oscillator.

10: When selecting the on-chip oscillator for the WDT clock, the on-chip

oscillator does not stop.

Also, in low-speed mode, the on-chip oscillator stops in the QzROM

version regardless of the on-chip oscillator stop bit value. The on-chip

oscillator does not stop in the flash memory version, so set this bit to

"1" to stop the oscillation.

In on-chip oscillator mode, even if this bit is set to "1", the on-chip

oscillator oscillation does not stop in the flash memory version, but

stops in the QzROM version.

11: In low-speed mode, the XCIN-XCOUT oscillation stops if the port XC

switch bit is set to "0".

12:In XIN mode, the XIN-XOUT oscillation does not stop even if the XIN-

XOUT oscillation stop bit is set to "1".

13: 12.5 MHz

< f(XIN) ≤ 16 MHz is not available in the frequency/2 mode.

14: In the flash memory version, set the on-chip oscillator stop bit to "1"

(oscillation stops) because OCO is in the state set by the setting value

of the on-chip oscillator stop bit.

On-chip oscillator stop bit

0:Oscillating

1 : Stopped

Not used (do not write “1”)

Not used

(returns “0” when read)

Not used (do not write “1”)

Processor mode bits

b1 b0

0 0 : Single-chip mode

01 :

10 :

11 :

Stack page selection bit

0: 0page

1: 1page

Internal system clock selection bit

0 : Main clock selected

(includes OCO, XIN)

1: XCIN

–XCOUT selected

Port Xc switch bit

0 : I/O port function (Oscillation stop)

1: XCIN

–XCOUT oscillating function

XIN

–XOUT oscillation stop bit

0 : Oscillating

1 : Stopped

Main clock division ratio selection bit

(Valid only when CM3=0)

b7 b8

00 : f(XIN)/2 (frequency/2 mode)

01 : f(XIN)/8 (frequency/8 mode)

10 : f(XIN)/4 (frequency/4 mode)

1 1 : On-chip oscillator

CPU mode register 2

CPUM2

(address 001116, QzROM version, OSCSEL=L,

initial value: 0016)

(

QzROM version, OSCSEL=H,

initial value: 0116)

(

Flash memory version,

initial value: 0016)

CM8

CPU mode register

CPUM

(address 003B16, QzROM version, OSCSEL=L,

initial value: E016)

(

QzROM version, OSCSEL=H,

initial value: 4016)

(

Flash memory version,

initial value: E016)

CM0

CM1

CM2

CM3

CM4

CM5

CM6

CM7

Not available

(13)

• QzROM version

• Flash memory version

OSCSEL=L

• QzROM version

OSCSEL=H

(14)

(12)

(11)

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