ORSPI4 datasheet(134/263 Pages) LATTICE

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Lattice Semiconductor

ORCA ORSPI4 Data Sheet

134

The SERDES characterization test mode is conﬁgured by setting bits in the control registers via the system bus.

The transmit characterization test mode is entered when SCHAR_ENA= “1” (address 30830, bit 4) and

SCHAR_TXSEL= “1” (address 30830, bit 5). Entering this mode will cause chip port inputs to directly control the

SERDES low-speed transmit ports of one of the channels as shown in Table 39.

Table 39. SERDES Transmit Characterization Mode

The x in the table represents a single channel in the SERDES QUAD, selected by the SCHAR_CHAN control bits

(address 30830, bits 6 and 7). The decoding of SCHAR_CHAN is shown in Table 40.

Table 40. Decoding of SCHAR_CHAN

The receive characterization test mode is entered as long as TESTMD[1:0]N = 00. In this mode, one of the chan-

nels of SERDES outputs is observed at chip ports as shown in Table 41. The channel that is observed is also

based on the decoding of SCHAR_CHAN as shown in Table 40. The receive characterization pins can be observed

independently, whether the transmit characterization pins are enabled or not.

Table 41. SERDES Receive Characterization Mode

Required Inputs

Inputs Used During Mode

TESTMD[1:0]N=00,

SCHAR_EN=1,

SCHAR_TXSEL=1

TBCx (transmit)

← PMIA15

LDIN9x

← PMIA14

LDIN8x

← PMIA13

LDIN7x

← PMIA11

LDIN6x

← PMIA9

LDIN5x

← PMAI8

LDIN4x

← PMIA7

LDIN3x

← PMIA6

LDIN2x

← PMIA5

LDIN1x

← PMIA4

LDIN0x

← PMIA2

SCHAR_CHAN0

SCHAR_CHAN1

Channel

Required Inputs

Outputs Used During Mode

TESTMD[1:0]N=00

TBC311

→ PMID20

→ PMID21

BYTSYNC

→ PMID22

WDSYNC

→ PMID23

RBCO

→ PMID24

RBC1

→ PMID25

LDOUT9

→ PMID26

LDOUT8

→ PMID 27

LDOUT7

→ PMID28

LDOUT6

→ PMID29

LDOUT5

→ PMID30

LDOUT4

→ PMID31

LDOUT3

→ PMID32

LDOUT2

→ PMID33

LDOUT1

→ PMID34

LDOUT0

→ PMID35

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