ORSPI4 datasheet(133/263 Pages) LATTICE

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Lattice Semiconductor

ORCA ORSPI4 Data Sheet

133

Table 37. High-Speed Serial Loopback Conﬁguration Bit Deﬁnitions for the SERDES

Parallel Loopback at the SERDES Boundary

In this parallel loopback, differential data are received at the HDINP_x and HDINN_x pins and are retransmitted at

the HDOUTP_x and HDOUTN_x pins. The loopback path is at the interface between the SERDES blocks and the

MUX and DEMUX blocks and uses the parallel 10-bit buses at these interfaces (see Figure 70b). The loopback

connection is made such that the input signals to the TX SERDES block is the same as the output signals from the

RX SERDES block. In this parallel loopback mode, the MRWDx[39:0] signal lines remain active and the

TWDx[31:0], TCOMMAx[3:0] and TBIT9x[3:0] signal lines are not used. This mode is normally used for tests where

serial test data is received from and transmitted to either test equipment or via a serial backplane to a remote card

and is the basic loopback path shown earlier in Figure 70(b). The data rate selection bits TXHR and RXHR in the

channel conﬁguration registers must be conﬁgured to carry the same value. Also, the 8b/10b encoder and decoder

are excluded from the loopback path by setting the 8b10bT and 8b10bR conﬁguration bits to “0”. Table 38 illus-

trates the control interface register conﬁguration for the parallel loopback.

Table 38. Parallel Loopback at the SERDES Boundary Conﬁguration Bit Deﬁnitions for the SERDES

SERDES Characterization Test Mode

The SERDES characterization mode is a test mode that allows for direct control and observation of the transmit

and receive SERDES interfaces at chip ports. With these modes the SERDES logic and I/O can be tested one

channel at a time in either the receive or transmit modes.

The SERDES test mode requires that the SERDES block be selected instead of the SPIB block during the Module

Generation phase of the ORSPI4 in

ispLEVER. In addition, the TESTMD[1:0]N signals need to be set to “0” during

SERDES characterization.

Address

Bit Value

Bit Name

Comments

30002, 30012,

30022, 30032

Bit 0 = 0 or 1

TXHR

Set to “0” or “1”.

TXHR and RXHR bits must be set to the same value.

Bit 7 = 0 or 1

8B10BT

Set to “0” or “1”. If set to “0”, the 8b/10b encoder is excluded from

the loopback path. The 8b/10b encoder and decoder selection con-

trol bits must both be set to the same value.

30801

Bit 0 = 1 (Channel A)

Bit 1 = 1 (Channel B)

Bit 2 = 1 (Channel C)

Bit 3 = 1 (Channel D)

LOOPENB_xx

Set any of the bits 0-3 to “1” to do serial loopback on the corre-

sponding channel.* The high-speed serial outputs will not be active.

*This test mode can also be set using TESTEN_xx in place of LOOPENB_xx. In that case, Test Mode must be set to 00000.

Address (Hex)

Bit Value

Bit Name

Comments

30002, 30012,

30022, 30032

Bit 0 = 0 or 1

TXHR

Set to “0” or “1”. TXHR and RXHR bits must be set to the same

value.

Bit 7 = 0

8b10bT

Set to “0” The 8b/10b encoder is excluded from the loopback path.

The 8b/10b encoder and decoder selection control bits must both be

set to “0”.

30003, 30013,

30023, 30033

Bit 0 = 0 or 1

RXHR

Set to “0” or “1”. TXHR and RXHR bits must be set to the same

value.

Bit 3 = 0

8b10bR

Set to “0”. The 8b/10b decoder is excluded from the loopback path.

The 8b/10b encoder and decoder selection control bits must both be

set to “0”.

30005

Bit 7 = 1

GTESTEN

SET to “1” if the loopback is done globally on all four channels.

30006, 30016,

30026, 30036

Bits[4:0]

Testmode

Set to 00001

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