TMS320VC5509 datasheet(27/124 Pages) TI

27 / 124 page

Introduction

April 2001 − Revised January 2008

SPRS163H

Table 2−3. Signal Descriptions (Continued)

TERMINAL

NAME

RESET

CONDITION

BK‡

FUNCTION

I/O/Z†

MULTIPLEXED

SIGNAL NAME

MULTICHANNEL BUFFERED SERIAL PORTS SIGNALS (CONTINUED)

S23

O/Z

McBSP2 data transmit or MultiMedia Card/Secure Digital2 serial clock. At

reset, this pin is configured as McBSP2.DX.

McBSP2.DX

O/Z

McBSP2

serial

data

transmit.

McBSP2.DX

placed

the

high-impedance state when not transmitting, when RESET is asserted, or

when OFF is low. McBSP2.DX is selected when the External Bus

Selection Register has 00 in the Serial Port2 Mode bit field or following

reset.

Hi-Z

MMC2.CLK

SD2.CLK

MMC2 or SD2 serial clock is selected when the External Bus Selection

S24

I/O/Z

McBSP2 transmit clock or MultiMedia Card/Secure Digital2 data0. At

reset, this pin is configured as McBSP2.CLKX.

McBSP2.CLKX

I/O/Z

McBSP2 transmit clock. McBSP2.CLKX serves as the serial shift clock for

the serial port transmitter. The McBSP2.CLKX pin is configured as input

after reset. McBSP2.CLKX is selected when the External Bus Selection

Input

MMC2.DAT

SD2.DAT0

I/O/Z

MMC2 or SD2 data0 pin is selected when the External Bus Selection

S25

I/O/Z

McBSP2 transmit frame synchronization or Secure Digital2 data3. At

reset, this pin is configured as McBSP2.FSX.

McBSP2.FSX

I/O/Z

McBSP2 frame synchronization. The McBSP2.FSX pulse initiates the

data transmit process over McBSP2.DX. McBSP2.FSX is configured as

an input following reset. McBSP2.FSX is selected when the External Bus

Selection Register has 00 in the Serial Port2 Mode bit field or following

reset.

Input

SD2.DAT3

I/O/Z

SD2 data3 is selected when the External Bus Selection Register has 10 in

the Serial Port2 Mode bit field.

USB

I/O/Z

Differential (positive) receive/transmit. At reset, this pin is configured as

input.

Input

I/O/Z

Differential (negative) receive/transmit. At reset, this pin is configured as

input.

Input

O/Z

Pullup output. This pin is used to pull up the detection resistor required by

the USB specification. The pin is internally connected to USBVDD via a

software controllable switch (CONN bit of the USBCTL register).

Output

A/D

AIN0

Analog Input Channel 0

Input

AIN1

Analog Input Channel 1

Input

AIN2 (BGA only)

Analog Input Channel 2. (BGA package only)

Input

AIN3 (BGA only)

Analog Input Channel 3. (BGA package only)

Input

† I = Input, O = Output, S = Supply, Hi-Z = High-impedance

‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,

PD = pulldown, H = hysteresis input buffer

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