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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320VC5509 датащи(PDF) 63 Page - Texas Instruments |
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TMS320VC5509 датащи(HTML) 63 Page - Texas Instruments |
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63 / 124 page  Functional Overview 63 April 2001 − Revised January 2008 SPRS163H Table 3−33. USB Module Registers (Continued) WORD ADDRESS RESET VALUE† DESCRIPTION REGISTER NAME DMA CONTEXTS (CONTINUED) 0x5848 DMAC_I1 Input Endpoint 1 DMA Context Register Undefined 0x5850 DMAC_I2 Input Endpoint 2 DMA Context Register Undefined 0x5858 DMAC_I3 Input Endpoint 3 DMA Context Register Undefined 0x5860 DMAC_I4 Input Endpoint 4 DMA Context Register Undefined 0x5868 DMAC_I5 Input Endpoint 5 DMA Context Register Undefined 0x5870 DMAC_I6 Input Endpoint 6 DMA Context Register Undefined 0x5878 DMAC_I7 Input Endpoint 7 DMA Context Register Undefined DATA BUFFER 0x5880 Data Buffers Contains X/Y data buffers for endpoints 1 – 7 Undefined 0x6680 OEB_0 Output Endpoint 0 Buffer Undefined 0x66C0 IEB_0 Input Endpoint 0 Buffer Undefined 0x6700 SUP_0 Setup Packet for Endpoint 0 Undefined ENDPOINT DESCRIPTOR BLOCKS 0x6708 OEDB_1 Output Endpoint 1 Descriptor Register Block Undefined 0x6710 OEDB_2 Output Endpoint 2 Descriptor Register Block Undefined 0x6718 OEDB_3 Output Endpoint 3 Descriptor Register Block Undefined 0x6720 OEDB_4 Output Endpoint 4 Descriptor Register Block Undefined 0x6728 OEDB_5 Output Endpoint 5 Descriptor Register Block Undefined 0x6730 OEDB_6 Output Endpoint 6 Descriptor Register Block Undefined 0x6738 OEDB_7 Output Endpoint 7 Descriptor Register Block Undefined 0x6740 Reserved 0x6748 IEDB_1 Input Endpoint 1 Descriptor Register Block Undefined 0x6750 IEDB_2 Input Endpoint 2 Descriptor Register Block Undefined 0x6758 IEDB_3 Input Endpoint 3 Descriptor Register Block Undefined 0x6760 IEDB_4 Input Endpoint 4 Descriptor Register Block Undefined 0x6768 IEDB_5 Input Endpoint 5 Descriptor Register Block Undefined 0x6770 IEDB_6 Input Endpoint 6 Descriptor Register Block Undefined 0x6778 IEDB_7 Input Endpoint 7 Descriptor Register Block Undefined CONTROL AND STATUS REGISTERS 0x6780 IEPCNF_0 Input Endpoint 0 Configuration xxxx xxxx 0000 0000 0x6781 IEPBCNT_0 Input Endpoint 0 Byte Count xxxx xxxx 1000 0000 0x6782 OEPCNF_0 Output Endpoint 0 Configuration xxxx xxxx 0000 0000 0x6783 OEPBCNT_0 Output Endpoint 0 Byte Count xxxx xxxx 0000 0000 0x6784 − 0x6790 Reserved 0x6791 GLOBCTL Global Control Register xxxx xxxx 0000 0000 0x6792 VECINT Vector Interrupt Register xxxx xxxx 0000 0000 0x6793 IEPINT Input Endpoint Interrupt Register xxxx xxxx 0000 0000 0x6794 OEPINT Output Endpoint Interrupt Register xxxx xxxx 0000 0000 0x6795 IDMARINT Input DMA Reload Interrupt Register xxxx xxxx 0000 0000 0x6796 ODMARINT Output DMA Reload Interrupt Register xxxx xxxx 0000 0000 † Hardware reset; x denotes a “don’t care.” NOTE: The USB module must be brought out of reset by setting bit 2 of the USB Idle Control and Status Register before any USB module register read or write attempt. |
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