TMS320VC5509 datasheet(21/124 Pages) TI

21 / 124 page

Introduction

April 2001 − Revised January 2008

SPRS163H

Table 2−3. Signal Descriptions (Continued)

TERMINAL

NAME

RESET

CONDITION

BK‡

FUNCTION

I/O/Z†

MULTIPLEXED

SIGNAL NAME

PARALLEL BUS (CONTINUED)

I/O/Z

EMIF byte enable 0 control or HPI byte identification. This pin serves in one

of two functions: EMIF byte enable 0 control (EMIF.BE0) or HPI byte

identification (HPI.HBE0). The initial state of this pin depends on the

GPIO0 pin. See Section 3.5.1 for more information.

EMIF.BE0

O/Z

Active-low EMIF byte enable 0 control. EMIF.BE0 is selected when the

Parallel Port Mode bit field of the External Bus Selection Register is set to

00 or 01.

GPIO0 = 1:

Output,

EMIF.BE0

HPI.HBE0

HPI byte identification. This pin, in conjunction with HPI.HBE1, identifies

the first or second byte of the transfer. HPI.HBE0 is selected when the

Parallel Port Mode bit field is set to 10 or 11.

NOTE:

As of Revision 3.1 of the silicon, the byte-enable function on the

HPI will no longer be supported. HPI.HBE0 and HPI.HBE1 must

be pulled down by external resistors or driven low by the host

processor.

EMIF.BE0

GPIO0 = 0:

Input,

HPI.HBE0

I/O/Z

EMIF byte enable 1 control or HPI byte identification. This pin serves in one

of two functions: EMIF byte enable 1 control (EMIF.BE1) or HPI byte

identification (HPI.HBE1). The initial state of this pin depends on the

GPIO0 pin. See Section 3.5.1 for more information.

EMIF.BE1

O/Z

Active-low EMIF byte enable 1 control. EMIF.BE1 is selected when the

Parallel Port Mode bit field of the External Bus Selection Register is set to

00 or 01.

GPIO0 = 1:

Output,

EMIF.BE1

HPI.HBE1

HPI byte identification. This pin, in conjunction with HPI.HBE0, identifies

the first or second byte of the transfer. HPI.HBE1 is selected when the

Parallel Port Mode bit field is set to 10 or 11.

NOTE:

As of Revision 3.1 of the silicon, the byte-enable function on the

HPI will no longer be supported. HPI.HBE0 and HPI.HBE1 must

be pulled down by external resistors or driven low by the host

processor.

EMIF.BE1

GPIO0 = 0:

Input,

HPI.HBE1

† I = Input, O = Output, S = Supply, Hi-Z = High-impedance

‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,

PD = pulldown, H = hysteresis input buffer

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