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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CDCE72010 датащи(PDF) 24 Page - Texas Instruments |
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CDCE72010 датащи(HTML) 24 Page - Texas Instruments |
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24 / 70 page  CDCE72010 SCAS858 – JUNE 2008...................................................................................................................................................................................................... www.ti.com Register 3: SPI Mode SPI RAM POWER UP BIT NAME RELATED BLOCK DESCRIPTION/FUNCTION BIT BIT CONDITION 0 A0 Address 0 1 1 A1 Address 1 1 2 A2 Address 2 0 3 A3 Address 3 0 When set to 0, the REF-clock frequency detector is ON 4 0 DIS_FDET_REF PLL Freq. Detect EEPROM When set to 1, it is switched OFF When set to 1, the feedback path frequency detector is switched OFF 5 1 DIS_FDET_FB Diagnostics EEPROM (TI Test-GTME) 6 2 BIAS_DIV01<0> When BIAS_DIV01<1:0> = Output Divider 00, No current reduction for all output-divider EEPROM 0 and 1 01, Current reduction for all output-divider by about 20% 7 3 BIAS_DIV01<1> 10, Current reduction for all output-divider by about 30% 8 4 BIAS_DIV23<0> When BIAS_DIV23<1:0> = Output Divider 00, No current reduction for all output-divider EEPROM 2 and 3 01, Current reduction for all output-divider by about 20% 9 5 BIAS_DIV23<1> 10, Current reduction for all output-divider by about 30% 10 6 PH3ADJC0 11 7 PH3ADJC1 12 8 PH3ADJC2 13 9 PH3ADJC3 Output 3 Coarse phase adjust select for Output Divider 3 EEPROM 14 10 PH3ADJC4 15 11 PH3ADJC5 16 12 PH3ADJC6 17 13 OUT3DIVRSEL0 18 14 OUT3DIVRSEL1 19 15 OUT3DIVRSEL2 Output Divider 3 ratio select 20 16 OUT3DIVRSEL3 Output 3 EEPROM (seeTable 7) 21 17 OUT3DIVRSEL4 22 18 OUT3DIVRSEL5 23 19 OUT3DIVRSEL6 When set to 0, the divider is disabled 24 20 EN3DIV Output 3 EEPROM When set to 1, the divider is enabled 25 21 PECL3HISWING Output 3 High Output Voltage Swing in LVPECL Mode if set to 1 EEPROM 26 22 CMOSMODE3PX LVCMOS mode select for OUTPUT 3 Positive Pin. Output 3 EEPROM (X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State 27 23 CMOSMODE3PY 28 24 CMOSMODE3NX LVCMOS mode select for OUTPUT 3 Negative Pin. Output 3 EEPROM (X,Y) = 00: Active, 10: Inverting, 11: Low, 01: 3-State 29 25 CMOSMODE3NY RAM BITS OUTPUT TYPE 30 26 OUTBUFSEL3X Output 3 22 23 24 25 26 27 EEPROM LVPECL 0 0 0 0 0 1 LVDS 0 1 0 1 1 1 31 27 OUTBUFSEL3Y Output 3 LVCMOS See Settings Above(1) 0 0 EEPROM All Outputs Disabled 0 1 0 1 1 0 (1) Use description for bits 22, 23, 24, and 25 for setting the LVCMOS outputs 24 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): CDCE72010 |
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