PD69104B1SLASHF datasheet(22/36 Pages) MICROSEMI

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4-Port PoE Manager

Microsemi Proprietary and Confidential. PD69104B1/F Datasheet Revision 2.0

Pin Name

Type

Description

AGND

Power

Analog ground

LED 0

Open

drain

output

Port 0 LED indication – active low ('0' = LED on). See

Table 22 (see page 29)

LED 1

Open

drain

output

Port 1 LED indication – active low ('0' = LED on). See

Table 22 (see page 29)

PORT_SENSE0

Analog

input

Sense resistor port input (connected to 0.36 Ω, 1% resistor to QGND with ~6 mΩ

trace for measurements accuracy).

VPORT_NEG0

Analog

I/O

Negative port output

PORT_SENSE1

Analog

input

Sense resistor port input (connected to 0.36 Ω, 1% resistor to QGND with ~6 mΩ

trace for measurements accuracy).

VPORT_NEG1

Analog

I/O

Negative port output

REG_EN_N/NC

Analog

I/O

An input pin that enables control of the 3.3 V internal regulator. Disables internal

3.3 V regulator in case external 3.3 V is used to supply the chip.

If connected to GND or unconnected, internal regulator is enabled. If connected to

3.3 V , internal regulator is disabled.

Analog

I/O

A test pin used only during production. Keep unconnected.

VMAIN

Power

Supplies voltage for the internal analog circuitry. A 1 µF (or higher) low ESR bypass

capacitor, connected to AGND, should be placed as close as possible to this pin

through low resistance traces.

VAUX5

Power

Regulated 5 V output voltage source, needs to be connected to a filtering capacitor

of 4.7 µF or higher.

If an external NPN is used to regulate the voltage, connect this pin to the emitter (the

collector should be connected to V

MAIN

DRV_VAUX5

Power

Driven outputs for 5 V external regulations. In case internal regulation is used,

connect to pin 16.

In case an external NPN is used to regulate the voltage, connect this pin to the Base.

AGND

Power

Analog ground

VAUX3P3_INT

Power

In case internal 3.3 V regulator is used, connected to V

(pin 20).

AUX3P3

In case external 3.3 V regulator is used, connect to VAUX5 (pin 16).

VAUX3P3

Power

Regulated 3.3 V output voltage source. A 4.7 μF or higher filtering capacitor should

be connected between this pin and AGND.

When an external 3.3 V regulator is used, connect it to this pin to supply the chip.

QGND

Power

Quiet analog ground

IREF

Analog

input

A reference resistor pin. A 30.1 kΩ, 1% resistor should be connected between this pin

and QGND.

TRIM

Test

input

Trimming input for IC production. Should be connected to V

AUX3P3

MAX_LED

Open

drain

output

MAX LED analog output. Indicates the device has exceeded maximum power budget.

See

Table 22 (see page 29)

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