CSD97396Q4M

SLPS572 – DECEMBER 2015

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6 Specifications

6.1 Absolute Maximum Ratings

TA = 25°C (unless otherwise noted)

(1)

MIN

MAX

UNIT

VIN to PGND

–0.3

30

V

VSW to PGND , VIN to VSW

–0.3

30

V

VSW to PGND, VIN to VSW (<10 ns)

–7

33

V

VDD to PGND

–0.3

6

V

PWM, SKIP# to PGND

–0.3

6

V

BOOT to PGND

–0.3

35

V

BOOT to PGND (<10 ns)

–2

38

V

BOOT to BOOT_R

–0.3

6

V

BOOT to BOOT_R (duty cycle <0.2%)

8

V

PD

Power dissipation

8

W

TJ

Operating temperature

–40

150

°C

Tstg

Storage temperature

–55

150

°C

(1)

Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only

and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE

UNIT

Human body model (HBM)(1)

±1000

V(ESD)

Electrostatic discharge

V

Charged device model (CDM)(2)

±500

(1)

JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

TA = 25°C (unless otherwise noted)

MIN

MAX

UNIT

VDD

Gate drive voltage

4.5

5.5

V

VIN

Input supply voltage (1)

24

V

IOUT

Continuous output current

VIN = 12 V, VDD = 5 V, VOUT = 1.8 V,

30

A

ƒSW = 500 kHz, LOUT = 0.29 µH

(2)

IOUT-PK

Peak output current(3)

65

A

ƒSW

Switching frequency

CBST = 0.1 µF (min)

2000

kHz

On-time duty cycle

85%

Minimum PWM on-time

40

ns

Operating temperature

–40

125

°C

(1)

Operating at high VIN can create excessive AC voltage overshoots on the switch node (VSW) during MOSFET switching transients. For

reliable operation, the switch node (VSW) to ground voltage must remain at or below the Absolute Maximum Ratings.

(2)

Measurement made with six 10 µF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across VIN to PGND pins.

(3)

System conditions as defined in Note 2. Peak Output Current is applied for tp = 10 ms, duty cycle ≤1%

6.4 Thermal Information

TA = 25°C (unless otherwise noted)

THERMAL METRIC

MIN

TYP

MAX

UNIT

RθJC

Junction-to-case thermal resistance (top of package)(1)

22.8

°C/W

RθJB

Junction-to-board thermal resistance(2)

2.5

°C/W

(1)

RθJC is determined with the device mounted on a 1 inch² (6.45 cm²), 2 oz (0.071 mm thick) Cu pad on a 1.5 inch x 1.5 inch, 0.06 inch

(1.52 mm) thick FR4 board.

(2)

RθJB value based on hottest board temperature within 1 mm of the package.

4

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