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MPC8280 датащи(PDF) 220 Page - Freescale Semiconductor, Inc |
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MPC8280 датащи(HTML) 220 Page - Freescale Semiconductor, Inc |
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220 / 1386 page ![]() System Interface Unit (SIU) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 4-48 Freescale Semiconductor 4.3.3.3 Periodic Interrupt Timer Register (PITR) The periodic interrupt timer register (PITR), shown in Figure 4-40, is a read-only register that shows the current value in the periodic interrupt down counter. The PITR counter is not affected by reads or writes to it. Table 4-23 describes PITR fields. 4.3.4 PCI Control Registers Two pairs of registers detect accesses from the 60x bus side to the PCI bridge (other than PCI internal registers accesses). Each pair consists of a PCI base register (PCIBRx) for comparing addresses and a corresponding PCI mask register (PCIMSKx). 0 15 Field PIT Reset 0000_0000_0000_0000 R/W Read Only Addr 0x10248 16 31 Field — Reset 0000_0000_0000_0000 R/W Read Only Addr 0x1024A Figure 4-40. Periodic Interrupt Timer Register (PITR) Table 4-23. PITR Field Descriptions Bits Name Description 0–15 PITC Periodic interrupt timing count. Bits 0–15 are defined as the PIT. It contains the current count remaining for the periodic timer. Writes have no effect on this field. 16–31 — Reserved, should be cleared. |
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