AD9984APCBZ datasheet(22/44 Pages) AD

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AD9984A

Rev. 0 | Page 22 of 44

2-WIRE SERIAL CONTROL PORT

A 2-wire serial control interface is provided with the AD9984A.

Up to two AD9984A devices can be connected to the 2-wire

serial interface with each device having a unique address.

The 2-wire serial interface comprises a clock (SCL) and a bi-

directional data (SDA) pin. The analog flat panel interface acts

as a slave for receiving and transmitting data over the serial

interface. When the serial interface is not active, the logic levels

on SCL and SDA are pulled high by external pull-up resistors.

Data received or transmitted on the SDA line must be stable for

the duration of the positive-going SCL pulse. Data on SDA must

change only when SCL is low. If SDA changes state while SCL is

high, the serial interface interprets that action as a start or stop

sequence.

The following are the five components to serial bus operation:

•

Start signal

•

Slave address byte

•

Base register address byte

•

Data byte to read or write

•

Stop signal

When the serial interface is inactive (SCL and SDA are high),

communication is initiated by sending a start signal. The start

signal is a high-to-low transition on SDA while SCL is high.

This signal alerts all slaved devices that a data transfer sequence

is coming.

The first 8 bits of data transferred after a start signal comprise a

7-bit slave address (the first seven bits) and a single R/W bit

(the eighth bit). The R/W bit indicates the direction of data

transfer, read from 1 or write to 0 on the slave device. If the

transmitted slave address matches the address of the device, the

AD9984A acknowledges the match by bringing SDA low on the

ninth SCL pulse. If the addresses do not match, the AD9984A

does not acknowledge it.

Table 13. Serial Port Addresses

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

A6 (MSB)

DATA TRANSFER VIA SERIAL INTERFACE

For each byte of data read or written, the MSB is the first bit in

the sequence.

If the AD9984A does not acknowledge the master device during

a write sequence, the SDA remains high so the master can generate

a stop signal. If the master device does not acknowledge the

AD9984A during a read sequence, the AD9984A interprets this

as end of data. The SDA remains high so the master can generate

a stop signal.

Writing data to specific control registers of the AD9984A

requires writing to the 8-bit address of the control register of

interest after the slave address has been established. This control

After the initial data byte is written, the base address auto-

increments by one for each additional data byte. If more bytes

are transferred than available addresses, the address does not

increment and remains at its maximum value of 0x44. Any base

address higher than 0x44 does not produce an acknowledge

signal. Data is read from the control registers of the AD9984A in

a similar manner. Reading requires two data transfer operations.

•

The base address must be written with the R/W bit of the

slave address byte low to set up a sequential read operation.

Reading (the R/W bit of the slave address byte high) begins

at the previously established base address. The address of the

read register auto-increments after each byte is transferred.

•

To terminate a read/write sequence to the AD9984A, a stop

signal must be sent. A stop signal comprises a low-to-high

transition of SDA while SCL is high.

A repeated start signal occurs when the master device driving

the serial interface generates a start signal without first generating

a stop signal to terminate the current communication. This is used

to change the mode of communication (read, write) between

the slave and master without releasing the serial interface lines.

SDA

SCL

tBUFF

tSTAH

tDHO

tDSU

tDAL

tDAH

tSTASU

tSTOSU

Figure 18. Serial Port Read/Write Timing

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