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AD9984APCBZ датащи(PDF) 18 Page - Analog Devices

номер детали AD9984APCBZ
подробное описание детали  High Performance 10-Bit Display Interface
PDF  44 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9984APCBZ датащи(HTML) 18 Page - Analog Devices

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AD9984A
Rev. 0 | Page 18 of 44
HSYNCOUT
VSYNC
FILTER
WINDOW
EXPECTED
EDGE
FILTER
WINDOW
EQUALIZATION
PULSES
HSYNCIN
Figure 11. Sync Processing Filter
Vsync Filter and Odd/Even Fields
The Vsync filter is used to eliminate spurious Vsyncs, maintain
a stable timing relationship between the Vsync and Hsync
output signals, and generate the odd/even field output.
The filter works by examining the placement of Vsync with
respect to Hsync and if necessary, shifting it in time slightly.
The goal is to keep the Vsync and Hsync leading edges from
switching at the same time, thus eliminating confusion as to
when the first line of a frame occurs. Register 0x14, Bit 2 enables
the Vsync filter. Use of the Vsync filter is recommended for all
cases, including interlaced video, and is required when using
the Hsyncs per Vsync counter. Figure 12 and Figure 13 illustrate
even/odd field determination in two situations.
FIELD 1
FIELD 0
FIELD 1
FIELD 0
23
2
1
44
31
HSYNCIN
VSYNCIN
VSYNCOUT
O/E FIELD
EVEN FIELD
QUADRANT
SYNC SEPERATOR THRESHOLD
Figure 12. Even Field
FIELD 1
FIELD 0
FIELD 1
FIELD 0
23
2
1
44
31
HSYNCIN
VSYNCIN
VSYNCOUT
O/E FIELD
ODD FIELD
QUADRANT
SYNC SEPERATOR THRESHOLD
Figure 13. Odd Field



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