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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD9984APCBZ датащи(PDF) 1 Page - Analog Devices |
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AD9984APCBZ датащи(HTML) 1 Page - Analog Devices |
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1 / 44 page  High Performance 10-Bit Display Interface AD9984A Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. FEATURES 10-bit, analog-to-digital converters 170 MSPS maximum conversion rate Low PLL clock jitter at 170 MSPS Automatic gain matching Automated offset adjustment 2:1 input mux Power-down via dedicated pin or serial register 4:4:4, 4:2:2, and DDR output format modes Variable output drive strength Odd/even field detection External clock input Regenerated Hsync output Programmable output high impedance control Hsyncs per Vsync counter Sync-on-green (SOG) pulse filter Pb-free package APPLICATIONS Advanced TVs Plasma display panels LCDTV HDTV RGB graphics processing LCD monitors and projectors Scan converters FUNCTIONAL BLOCK DIAGRAM SYNC PROCESSING PLL POWER MANAGEMENT SOGOUT ODD/EVEN FIELD HSOUT VSOUT/A0 VOLTAGE REFS SERIAL REGISTER SDA SCL FILT CLAMP EXTCK/COAST HSYNC0 HSYNC1 AD9984A Y/GREENOUT Cb/Cr/REDOUT REFHI REFLO DATACK 2:1 MUX Pr/REDIN0 Pr/REDIN1 Y/GREENIN0 Y/GREENIN1 VSYNC1 VSYNC0 2:1 MUX SOGIN0 SOGIN1 2:1 MUX Cb/BLUEOUT CLAMP 10 10 AUTO OFFSET AUTO GAIN 10-BIT ADC PGA Pb/BLUEIN0 Pb/BLUEIN1 2:1 MUX CLAMP 10 10 AUTO OFFSET AUTO GAIN 10-BIT ADC PGA 2:1 MUX CLAMP 10 10 AUTO OFFSET AUTO GAIN 10-BIT ADC PGA 2:1 MUX Figure 1. GENERAL DESCRIPTION The AD9984A is a complete 10-bit, 170 MSPS, monolithic analog interface optimized for capturing YPbPr video and RGB graphics signals. Its 170 MSPS encode rate capability and full power analog bandwidth of 300 MHz support all HDTV video modes up to 1080p, as well as graphics resolutions up to UXGA (1600 × 1200 at 60 Hz). The AD9984A includes a 170 MHz triple ADC with an internal reference, a PLL, and programmable gain, offset, and clamp control. The user provides only a 1.8 V power supply and an analog input. Three-state CMOS outputs can be powered from 1.8 V to 3.3 V. The AD9984A on-chip PLL generates a sample clock from the tri-level sync (for YPbPr video) or the horizontal sync (for RGB graphics). Sample clock output frequencies range from 10 MHz to 170 MHz. With internal coast generation, the PLL maintains its output frequency in the absence of a sync input. A 32-step sampling clock phase adjustment is provided. Output data, sync, and clock phase relationships are maintained. The auto-offset feature can be enabled to automatically restore the signal reference levels and calibrate out any offset differences between the three channels. The auto channel-to-channel gain- matching feature can be enabled to minimize any gain mismatches between the three channels. The AD9984A also offers full sync processing for composite sync and sync-on-green applications. A clamp signal is generated internally or can be provided by the user through the CLAMP input pin. Fabricated in an advanced CMOS process, the AD9984A is provided in a space-saving, Pb-free, 80-lead low profile quad flat package (LQFP) or 64-lead lead frame chip scale package (LFCSP) and is specified over the 0°C to 70°C temperature range. |
Аналогичный номер детали - AD9984APCBZ |
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Аналогичное описание - AD9984APCBZ |
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