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AT83SND2CMP3 датащи(PDF) 57 Page - ATMEL Corporation |
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AT83SND2CMP3 датащи(HTML) 57 Page - ATMEL Corporation |
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57 / 97 page ![]() 57 AT83SND2CMP3 7524B–MP3–05/06 Figure 46. MMC Clock Generator and Symbol As soon as MMCEN bit in MMCON2 is set, the MMC controller receives its system clock. The MMC command and data clock is generated on MCLK output and sent to the command line and data line controllers. Figure 47 shows the MMC controller configura- tion flow. As exposed in Section “Clock Control”, page 55, MMCD7:0 bits can be used to dynami- cally increase or reduce the MMC clock. Figure 47. Configuration Flow MMCD7:0 MMCLK MMC Clock MMCclk OSCclk MM CD 1 + ----------------------------- = OSC CLOCK MMCEN MMCON2.7 Controller Clock MMC CLOCK MMC Clock Symbol MMC Controller Configuration Configure MMC Clock MMCLK = XXh MMCEN = 1 FLOWC = 0 |
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