AT83SND2CMP3 datasheet(40/97 Pages) ATMEL

40 / 97 page

AT83SND2CMP3

7524B–MP3–05/06

Table 44.

PA Operating Mode

Table 45.

PA Low Power Mode

Audio Supplies and

Start-up

In operating mode AUDVBAT (supply of the audio power amplifier) must be between 3V

and 5,5V.

AUDVDD, HSVDD and VDD must be inferior or equal to AUDVBAT.

A typical application is AUDVBAT connected to a battery and AUDVDD, HSVDD and

VDD supplied by regulators.

AUDVBAT must be present at the same time or before AUDVDD, HSVDD and VDD.

AUDRST must be active low (0) until the voltages are not etablished and reach the

proper values.

To avoid noise issues, it is recommended to use ceramic decoupling capacitors for each

supply closed to the package. The track of the supplies must be optimized to minimize

the resistance especially on AUDVBAT where all the current from the power amplifier

comes from.

Note:

Refer to the application diagram.

Audio DAC Start-up Sequence

In order to minimize any audio output noise during the start-up, the following sequence

should be applied.

Example of power-on: Path DAC

to Headset Output

•

Desassert the Reset: write 07h at address 10h.

•

All precharge and Master on: write FFh at address 0Ch.

•

Line Out On: write 30h at address 00h.

•

Delay 500 ms.

•

Precharge off: write 0Ch at address 01h.

•

Delay 1 ms.

•

Line Out on, DAC On: write 3Ch at address 00h.

Example of power-off: Path DAC

to Headset Output

•

DAC off: write 30h at address 00h.

•

Master off: write 00h at address 0Ch.

•

Delay 1 ms.

•

All off: write 00h at address 00h

APAON

APAPRECH

Operating Mode

Stand-By

Input Capacitors Precharge

Active Mode

Forbidden State

APALP

Power Mode

Low power mode

High power mode

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