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AT83SND2CMP3 датащи(PDF) 5 Page - ATMEL Corporation |
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AT83SND2CMP3 датащи(HTML) 5 Page - ATMEL Corporation |
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5 / 97 page ![]() 5 AT83SND2CMP3 7524B–MP3–05/06 Signals All the AT83SND2CMP3 signals are detailed by functionality in following tables. Table 1. Ports Signal Description Table 2. Clock Signal Description Table 3. Timer 0 and Timer 1 Signal Description Signal Name Type Description Alternate Function P0.7:0 I/O Port 0 P0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1s written to them float and can be used as high impedance inputs. To avoid any parasitic current consumption, floating P0 inputs must be polarized to VDD or VSS. AD7:0 P2.7:0 I/O Port 2 P2 is an 8-bit bidirectional I/O port with internal pull-ups. A15:8 P3.7:0 I/O Port 3 P3 is an 8-bit bidirectional I/O port with internal pull-ups. RXD TXD INT0 INT1 T0 T1 WR RD P4.3:0 I/O Port 4 P4 is an 8-bit bidirectional I/O port with internal pull-ups. Signal Name Type Description Alternate Function X1 I Input to the on-chip inverting oscillator amplifier To use the internal oscillator, a crystal/resonator circuit is connected to this pin. If an external oscillator is used, its output is connected to this pin. X1 is the clock source for internal timing. - X2 O Output of the on-chip inverting oscillator amplifier To use the internal oscillator, a crystal/resonator circuit is connected to this pin. If an external oscillator is used, leave X2 unconnected. - FILT I PLL Low Pass Filter input FILT receives the RC network of the PLL low pass filter. - Signal Name Type Description Alternate Function INT0 I Timer 0 Gate Input INT0 serves as external run control for timer 0, when selected by GATE0 bit in TCON register. External Interrupt 0 INT0 input sets IE0 in the TCON register. If bit IT0 in this register is set, bit IE0 is set by a falling edge on INT0#. If bit IT0 is cleared, bit IE0 is set by a low level on INT0#. P3.2 |
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