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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT83SND2CMP3 датащи(PDF) 11 Page - ATMEL Corporation |
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AT83SND2CMP3 датащи(HTML) 11 Page - ATMEL Corporation |
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11 / 97 page  11 AT83SND2CMP3 7524B–MP3–05/06 F i gure 7 ). Va l ue of the fi l ter c o m ponent s are det ai l ed i n t he S e ct i on “D C Characteristics”. The VCO block is the Voltage Controlled Oscillator controlled by the voltage Vref pro- duced by the charge pump. It generates a square wave signal: the PLL clock. Figure 6. PLL Block Diagram and Symbol Figure 7. PLL Filter Connection PLL Programming The PLL is programmed using the flow shown in Figure 8. The PLL clock frequency will depend on MP3 decoder clock and audio interface clock frequencies. Figure 8. PLL Programming Flow PLLEN PLLCON.1 N6:0 N divider R divider VCO PLLclk OSCclk R 1 + () × N1 + ----------------------------------------------- = OSC CLOCK PFLD PLOCK PLLCON.0 PFILT CHP Vref Up Down R9:0 PLL CLOCK PLL Clock Symbol PLL Clock VSS FILT R C1 C2 VSS PLL Programming Configure Dividers N6:0 = xxxxxxb R9:0 = xxxxxxxxxxb Enable PLL PLLRES = 0 PLLEN = 1 PLL Locked? PLOCK = 1? |
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