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56F803 датащи(PDF) 38 Page - Freescale Semiconductor, Inc |
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56F803 датащи(HTML) 38 Page - Freescale Semiconductor, Inc |
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38 / 57 page ![]() Reset, Stop, Wait, Mode Select, and Interrupt Timing 56F803 Technical Data, Rev. 16 Freescale Semiconductor 33 Edge-sensitive Interrupt Request Width tIRW 1.5T — ns Figure 3-13 IRQA, IRQB Assertion to External Data Memory Access Out Valid, caused by first instruction execution in the interrupt service routine tIDM 15T — ns Figure 3-14 IRQA, IRQB Assertion to General Purpose Output Valid, caused by first instruction execution in the interrupt service routine tIG 16T — ns Figure 3-14 IRQA Low to First Valid Interrupt Vector Address Out recovery from Wait State3 tIRI 13T — ns Figure 3-15 IRQA Width Assertion to Recover from Stop State4 tIW 2T — ns Figure 3-16 Delay from IRQA Assertion to Fetch of first instruction (exiting Stop) OMR Bit 6 = 0 OMR Bit 6 = 1 tIF — — 275,000T 12T ns ns Figure 3-16 Duration for Level Sensitive IRQA Assertion to Cause the Fetch of First IRQA Interrupt Instruction (exiting Stop) OMR Bit 6 = 0 OMR Bit 6 = 1 tIRQ — — 275,000T 12T ns ns Figure 3-17 Delay from Level Sensitive IRQA Assertion to First Interrupt Vector Address Out Valid (exiting Stop) OMR Bit 6 = 0 OMR Bit 6 = 1 tII — — 275,000T 12T ns ns Figure 3-17 1. In the formulas, T = clock cycle. For an operating frequency of 80MHz, T = 12.5ns. 2. Circuit stabilization delay is required during reset when using an external clock or crystal oscillator in two cases: • After power-on reset • When recovering from Stop state 3. The minimum is specified for the duration of an edge-sensitive IRQA interrupt required to recover from the Stop state. This is not the minimum required so that the IRQA interrupt is accepted. 4. The interrupt instruction fetch is visible on the pins only in Mode 3. 5. Parameters listed are guaranteed by design. Table 3-11 Reset, Stop, Wait, Mode Select, and Interrupt Timing (Continued)1, 5 Operating Conditions: V SS = VSSA = 0 V, VDD = VDDA = 3.0–3.6V, TA = –40° to +85°C, CL ≤ 50pF Characteristic Symbol Min Max Unit See Figure |
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