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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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56F803 датащи(PDF) 34 Page - Freescale Semiconductor, Inc |
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56F803 датащи(HTML) 34 Page - Freescale Semiconductor, Inc |
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34 / 57 page  External Clock Operation 56F803 Technical Data, Rev. 16 Freescale Semiconductor 29 Figure 3-10 External Clock Timing Table 3-8 External Clock Operation Timing Requirements3 Operating Conditions: V SS = VSSA = 0 V, VDD = VDDA = 3.0–3.6 V, TA = –40° to +85°C Characteristic Symbol Min Typ Max Unit Frequency of operation (external clock driver)1 1. See Figure 3-9 for details on using the recommended connection of an external clock driver. fosc 0— 80 MHz Clock Pulse Width2, 3 2. The high or low pulse width must be no smaller than 6.25ns or the chip will not function. However, the high pulse width does not have to be any particular percent of the low pulse width. 3. Parameters listed are guaranteed by design. tPW 6.25 — — ns External Clock VIH VIL Note: The midpoint is VIL + (VIH – VIL)/2. 90% 50% 10% 90% 50% 10% tPW tPW |
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