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AT83SND2CMP3B датащи(PDF) 41 Page - ATMEL Corporation |
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AT83SND2CMP3B датащи(HTML) 41 Page - ATMEL Corporation |
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41 / 241 page ![]() 41 4341F–MP3–03/06 AT8xC51SND2C/MP3B 9.3 Registers Table 9-4. IEN0 Register IEN0 (S:A8h) – Interrupt Enable Register 0 Reset Value = 0000 0000b 76 543 210 EA EAUD EMP3 ES ET1 EX1 ET0 EX0 Bit Number Bit Mnemonic Description 7EA Enable All Interrupt Bit Set to enable all interrupts. Clear to disable all interrupts. If EA = 1, each interrupt source is individually enabled or disabled by setting or clearing its interrupt enable bit. 6 EAUD Audio Interface Interrupt Enable Bit Set to enable audio interface interrupt. Clear to disable audio interface interrupt. 5EMP3 MP3 Decoder Interrupt Enable Bit Set to enable MP3 decoder interrupt. Clear to disable MP3 decoder interrupt. 4ES Serial Port Interrupt Enable Bit Set to enable serial port interrupt. Clear to disable serial port interrupt. 3ET1 Timer 1 Overflow Interrupt Enable Bit Set to enable timer 1 overflow interrupt. Clear to disable timer 1 overflow interrupt. 2EX1 External Interrupt 1 Enable bit Set to enable external interrupt 1. Clear to disable external interrupt 1. 1ET0 Timer 0 Overflow Interrupt Enable Bit Set to enable timer 0 overflow interrupt. Clear to disable timer 0 overflow interrupt. 0EX0 External Interrupt 0 Enable Bit Set to enable external interrupt 0. Clear to disable external interrupt 0. |
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