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MPC5200 датащи(PDF) 57 Page - Freescale Semiconductor, Inc

номер детали MPC5200
подробное описание детали  Hardware Specifications
PDF  80 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5200 датащи(HTML) 57 Page - Freescale Semiconductor, Inc

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Electrical and Thermal Characteristics
MPC5200 Data Sheet, Rev. 4
Freescale Semiconductor
57
3.3.15.4 SPI Mode
NOTE
Output timing was specified at a nominal 50 pF load.
Figure 42. Timing Diagram — SPI Master Mode, Format 0 (CPHA = 0)
Table 46. Timing Specifications — SPI Master Mode, Format 0 (CPHA = 0)
Sym
Description
Min
Max
Units
SpecID
1
SCK cycle time, programable in the PSC CCS register
30.0
ns
A15.26
2
SCK pulse width, 50% SCK cycle time
15.0
ns
A15.27
3
Slave select clock delay, programable in the PSC CCS register
30.0
ns
A15.28
4
Output Data valid after Slave Select (SS)
8.9
ns
A15.29
5
Output Data valid after SCK
8.9
ns
A15.30
6
Input Data setup time
6.0
ns
A15.31
7
Input Data hold time
1.0
ns
A15.32
8
Slave disable lag time
8.9
ns
A15.33
9
Sequential Transfer delay, programable in the PSC CTUR / CTLR
register
15.0
ns
A15.34
10
Clock falling time
7.9
ns
A15.35
11
Clock rising time
7.9
ns
A15.36
SCK
(CLKPOL=0)
SCK
(CLKPOL=1)
MOSI
Output
Output
Output
SS
Output
MISO
Input
1
22
8
9
3
4
5
6
6
7
7
11
10
10
11



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