MPC5200 datasheet(32/80 Pages) FREESCALE

32 / 80 page

MPC5200 Data Sheet, Rev. 4

Electrical and Thermal Characteristics

Freescale Semiconductor

3.3.7.3

MUXed Mode

Note:

1. ACK can shorten the CS pulse width.

Wait States (WS) can be programmed in the Chip Select X Register, Bit field WaitP and WaitX. It can be specified 0 - 65535.

2. ACK is input and can be used to shorten the CS pulse width.

Table 26. MUXed Mode Timing

Sym

Description

Min

Max

Units

Notes

SpecID

tCSA

PCI CLK to CS assertion

1.8

A7.15

tCSN

PCI CLK to CS negation

1.8

A7.16

tALEA

PCI CLK to ALE assertion

A7.16

ALE assertion before Address, Bank,

TSIZ assertion

0.8

A7.17

CS assertion before Address, Bank,

TSIZ negation

0.7

A7.18

CS assertion before Data wr valid

0.7

A7.19

Data wr hold after CS negation

tIPBIck

A7.20

Data rd setup before CS negation

2.8

A7.21

Data rd hold after CS negation

(DC+1)*tPCIck

A7.22

ALE pulse width

tPCIck

A7.23

tTSA

CS assertion after TS assertion

0.8

A7.24

TS pulse width

tPCIck

A7.24

CS pulse width

(2+WS)*tPCIck

A7.25

tOEA

OE assertion before CS assertion

0.4

A7.26

tOEN

OE negation before CS negation

0.4

A7.27

t10

RW assertion before ALE assertion

tIPBIck

A7.26

t11

RW negation after CS negation

tPCIck

A7.27

t12

ACK assertion after CS assertion

tIPBIck

-ns

A7.28

t13

ACK negation after CS negation

tPCIck

A7.28

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