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MPC5200 датащи(PDF) 48 Page - Freescale Semiconductor, Inc

номер детали MPC5200
подробное описание детали  Hardware Specifications
PDF  80 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5200 датащи(HTML) 48 Page - Freescale Semiconductor, Inc

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MPC5200 Data Sheet, Rev. 4
Electrical and Thermal Characteristics
Freescale Semiconductor
48
Figure 33. Timing Diagram — SPI Master Mode, Format 0 (CPHA = 0)
NOTE
Output timing was specified at a nominal 50 pF load.
Table 37. Timing Specifications — SPI Slave Mode, Format 0 (CPHA = 0)
Sym
Description
Min
Max
Units
SpecID
1
Cycle time
4
1024
IP-Bus Cycle1
NOTES:
1
Inter Peripheral Clock is defined in the MPC5200 User Manual [1].
A11.12
2
Clock high or low time
2
512
IP-Bus Cycle1
A11.13
3
Slave select clock delay
15.0
—
ns
A11.14
4
Output Data valid after Slave Select (SS)
—
50.0
ns
A11.15
5
Output Data valid after SCK
—
50.0
ns
A11.16
6
Input Data setup time
50.0
—
ns
A11.17
7
Input Data hold time
0.0
—
ns
A11.18
8
Slave disable lag time
15.0
—
ns
A11.19
9
Sequential Transfer delay
1
—
IP-Bus Cycle1
A11.20
SCK
(CLKPOL=0)
SCK
(CLKPOL=1)
MOSI
Output
Output
Output
SS
Output
MISO
Input
1
22
8
9
3
4
5
6
6
7
7
11
10
10
11



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