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CSG14K_CSG8K

Functional Description

Datasheet

• PUBLIC

DS000571

• v1-00 • 2020-Dec-15

112

│ 79

Only windows for which the respective bit in YWIN_ENA is set high are actually read out. This way

multiple relevant Y-window specifications can be stored in the register map at the same time, enabling

only the relevant ones.

All enabled windows are concatenated together (the first row of a new window is read immediately

after the last row of the previous). The number of rows actually read in one frame (= # of DVAL within

one FVAL) is the sum of the SIZE fields of all windows enabled by YWIN_ENA.

The figure below shows an example of using multiple windows.

Figure 94:

Vertical ROI Example (monochrome)

Attention

Because the readout is dual-sided (top/bottom), the sensor top sequencer must be programmed to

only access rows in the upper half of the array (1860 to 3719) and the bottom sequencer to only

access rows in the lower half of the array (0 to 1859).

Small Window Mode

When reading out small windows, the unused rows are disabled to decrease the global sampling time

and finally increase the frame rate. For more details, refer to section 7.4.1.

Electrical Black Windows

With the YWIN_BLACK register, windows can be made 'electrical black' (setting a fixed voltage at the

read out path instead of the pixel voltage). If the respective bit of the YWIN_BLACK register is set high

(same mapping as YWIN_ENA), then all signal information in the window is suppressed. This results

in a black window containing only readout FPN information. This feature could be used for column

FPN correction.

FVAL

100

YWIN0

YWIN1

0 0 0 0 0 0 1 0 1 1

YWIN_ENA

200

YWIN2

YWIN3

DVAL

100

YADDR

101

102

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