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MCF5373CAB180 датащи(PDF) 37 Page - Freescale Semiconductor, Inc

номер детали MCF5373CAB180
подробное описание детали  Microprocessor Data Sheet
PDF  42 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MCF5373CAB180 датащи(HTML) 37 Page - Freescale Semiconductor, Inc

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Preliminary Electrical Characteristics
MCF5373 ColdFire® Microprocessor Data Sheet, Rev. 0.3
Preliminary
Freescale Semiconductor
37
The values in Table 23 correspond to Figure 26.
Figure 26. QSPI Timing
5.17 JTAG and Boundary Scan Timing
Table 23. QSPI Modules AC Timing Specifications
Name
Characteristic
Min
Max
Unit
QS1
QSPI_CS[3:0] to QSPI_CLK
1
510
tCYC
QS2
QSPI_CLK high to QSPI_DOUT valid.
—
10
ns
QS3
QSPI_CLK high to QSPI_DOUT invalid. (Output hold)
2
—
ns
QS4
QSPI_DIN to QSPI_CLK (Input setup)
9
—
ns
QS5
QSPI_DIN to QSPI_CLK (Input hold)
9
—
ns
Table 24. JTAG and Boundary Scan Timing
Num
Characteristics1
Symbol
Min
Max
Unit
J1
TCLK Frequency of Operation
fJCYC
DC
1/4
fsys/3
J2
TCLK Cycle Period
tJCYC
4—
tCYC
J3
TCLK Clock Pulse Width
tJCW
26
—
ns
J4
TCLK Rise and Fall Times
tJCRF
03
ns
J5
Boundary Scan Input Data Setup Time to TCLK Rise
tBSDST
4—
ns
J6
Boundary Scan Input Data Hold Time after TCLK Rise
tBSDHT
26
—
ns
J7
TCLK Low to Boundary Scan Output Data Valid
tBSDV
033
ns
J8
TCLK Low to Boundary Scan Output High Z
tBSDZ
033
ns
J9
TMS, TDI Input Data Setup Time to TCLK Rise
tTAPBST
4—
ns
J10
TMS, TDI Input Data Hold Time after TCLK Rise
tTAPBHT
10
—
ns
QSPI_CS[3:0]
QSPI_CLK
QSPI_DOUT
QS5
QS1
QSPI_DIN
QS3
QS4
QS2



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