4.6

Register Map

Table 2.

Register Map

REGISTER

ADDRESS

(HEX)

REGISTER

NAME

R/W

FUNCTION

BIT <b7>

BIT <b6>

BIT <b5>

BIT <b4>

BIT <b3>

BIT <b2>BIT <b1>

BIT <b0>

DEFAUL

T VALUE

(HEX)

IC RESET

0x04

FAULT

R

Fault Status

read-back

Reserved

(Always set

to ‘0’)

Not Used

VP UVP:

0 = Output

Voltage OK

1=UVP

Detect

VN UVP:

0 = Output

Voltage OK

1=UVP

Detect

VBST UVP:

0 = Output

Voltage OK

1= UVP

Detect

OTP:

0=Temp

Ok

1=OTP

detected

0x00

Cycle ENN

and ENP, or

cycle VIN

0x05

ENABLE

R/W

IC Enable /

Sequencing

Reserved

(Always set

to ‘0’)

VP Pull-down

resistor

0=Enabled

1 = Disabled

Not Used

VP:

0 = Disable

1=Enable

VN:

0 = Disable

1= Enable

VBST:

0=Disable

1=Enable

0x07

Cycle VIN

0x06

VBST_OUT

R/W

VBST Voltage

Adjustment

Not Used

VBST_OUT <4:0>

0x00

Cycle VIN

0x08

VN_OUT

R/W

VN Voltage

Adjustment

Not Used

VN_OUT <4:0>

0x00

Cycle VIN

0x09

VP_OUT

R/W

VP Voltage

Adjustment

Not Used

VP_OUT <4:0>

0x00

Cycle VIN

0x0D

VBST_

CNTRL

R/W

VBST - boost

regulator

control

Reserved

(Always set to ‘00’)

Boost LX slew rate

11 = Slowest

10 = Slow

01 = Fast

00 = Fastest

PFM mode

(synchronou

s PFM)

0=Enable

1 = Disable

Boost and Charge Pump Switching

Frequency

000 = 0.89 MHz

001 = 1.07 MHz

010 = 1.23 MHz

011 = 1.33 MHz

100 = 1.45 MHz

101 = 1.60 MHz

110 = 1.78 MHz

111 = 2.00 MHZ

0x34

Cycle VIN

0x0F

VN_

CNTRL

R/W

VN - negative

charge pump

control

Reserved

(Always set to ‘11’)

PFM Mode

0= Enabled

1 = Disabled

PWM min

pulse length

1=94ns

0 = 125ns

PFM peak current selection

00 = 4µA

01 = 6µA

10 = 5µA

11 = 7µA

PFM Pulse length

00 = 188ns

01 = 219ns

10 = 250ns

11 = 50% selected

frequency

0xDA

Cycle VIN

Notes:

11. Any Register Addresses/Pointers not indicated are Reserved Registers, and should not be used.

12. Bits labeled “Not Used” can be written and read from the volatile registers, but have no influence on the operation of the IC.