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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HC705CT4GRS/D датащи(PDF) 77 Page - NXP Semiconductors |
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HC705CT4GRS/D датащи(HTML) 77 Page - NXP Semiconductors |
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77 / 152 page  Synchronous Serial Interface (SSI) SSI Power Supply Source MC68HC705CT4 — Rev. 2.0 General Release Specification MOTOROLA Synchronous Serial Interface (SSI) 77 this occurrence, the programmer should ensure that all transfers are complete before entering the stop mode. If the SSI is configured to slave mode, further care should be taken in entering stop mode. The SCK pin will still accept a clock from an external master, allowing potentially unwanted transfers to take place and power consumption to be increased. The SSI will not generate interrupt requests in this situation but, on exiting stop mode through some other means, the SF flag may be found to be set and an interrupt request will be generated if SIE is also set at this point. To avoid these potential problems, it is safer to disable the SSI completely (SE = 0) before entering stop mode. The synchronous serial interface (SSI) is a 2-wire master/slave system including serial clock (SCK) and serial data input/output (SDIO). When operating as a master device, the serial clock speed is selectable between four rates. 9.7 SSI Power Supply Source The power supplied to the SSI is VDD and VSS, thus keeping the VDD2 and VSS2 free for the noise susceptible modules. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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