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HC705CT4GRS/D датащи(PDF) 20 Page - NXP Semiconductors |
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HC705CT4GRS/D датащи(HTML) 20 Page - NXP Semiconductors |
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20 / 152 page ![]() General Description General Release Specification MC68HC705CT4 — Rev. 2.0 20 General Description MOTOROLA 1.4 Signal Description The following paragraphs describe the signals. 1.4.1 VDD and VSS Power is supplied to the microcontroller’s digital circuits using these two pins. VDD is the positive supply and VSS is ground. 1.4.2 VDD2 and VSS2 Power is supplied to noise-susceptible circuitry such as the phase- locked loop (PLL), comparators, and oscillators that require “cleaner” supplies using these two pins. VDD2 is the positive supply and VSS2 is ground. 1.4.3 Maskable Interrupt Request (IRQ/VPP) This pin supplies the EPROM with the required programming voltage. In addition, this pin has a mask option as specified by the user that provides one of two different choices of interrupt triggering sensitivity. The options are: 1. Negative edge-sensitive triggering only 2. Both negative edge-sensitive and level-sensitive triggering The microcontroller unit (MCU) completes the current instruction before it responds to the interrupt request. When IRQ goes low for at least one tILIH, a logic 1 is latched internally to signify that an interrupt has been requested. When the MCU completes its current instruction, the interrupt latch is tested. If the interrupt latch contains a logic 1 and the interrupt mask bit (I bit) in the condition code register is clear, the MCU then begins the interrupt sequence. If the option is selected to include level-sensitive triggering, the IRQ input requires an external resistor to VDD for wire-OR operation. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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