DA6021 datasheet(28/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

28 of 224

www.dialog-semiconductor.com

SUSCLK

9.1.25

SUSCLK is the 32.768kHz RTC clock that is supplied from the SoC. It is available to DA6021 about 100ms after

RSMRST_B is de-asserted and continue to be available in S0, S0iX, S3 and S4 state. It is not available if the

platform will be in G3 mode when the suspend voltage rails are disable.

THERMTRIP_B

9.1.26

THERMTRIP_B is an active low dedicated input signal that notifies the PMIC of a SOC thermal event. It is valid

when RSMRST_B=1 and PLTRST_B=1 (de-asserted). Upon sensing the THERMTRIP_B signal has transitioned

low, the PMIC shuts down all rails immediately (hard shutdown, not waiting for SLP_S*_B signals from the SOC

to execute a Cold Off power down sequence). To avoid spurious detection during power sequencing, the

THERMTRIP_B signal is only sampled if PLTRST_B is de-asserted. THERMTRIP has internal pull-up.

PROCHOT_B

9.1.27

PROCHOT_B is an active low dedicated output signal used to notify the SOC of a PMIC, battery or system

thermal event. PROCHOT_B will be asserted when the PMIC temperature, battery temperature or system

temperature has crossed the alert thresholds define in the thermal monitoring section. It will also assert when

battery voltage drops to the threshold set in SVTM. PROCHOT_B is asserted if the PMIC die temperature rises

above the internally set alert threshold, for example 110°C, to prevent the PMIC from reaching critical

temperature. It is valid when RSMRST_B=1 and PLTRST_B=1 (de-asserted). The SOC will go into a lower

power state until the PMIC thermal event is cleared and the pin is de-asserted. PROCHOT_B has internal pull-

up.

SDMMC3_1P8_EN

9.1.28

SDMMC3_1P8_EN is a dedicated input signal from the SOC to select 1.8V or 3.3V for SD card.



SDMMC3_1P8_EN=1 to select 1.8V for SD card.



SDMMC3_1P8_EN=0 to select 3.3V for SD card.

It is valid when RSMRST_B=1 (de-asserted) and COREPWROK=1 (asserted).

SDMMC3_PWR_EN_B

9.1.29

SDMM3_PWR_EN_B is an active low dedicated output signal to enable SD card power. It is valid when

RSMRST_B=1 (de-asserted) and COREPWROK=1 (asserted).

MODEM_OFF_B

9.1.30

SDWN_B

9.1.31

The SDWN_B (Shut-Down Warning) signal is sent by the PMIC to the modem as a warning that a system

shutdown event is about to take place.

The SDWN_B signal is asserted (set low) during power down Task Lists. If the PMIC enters a catastrophic

shutdown condition which would normally bypass a Cold Off Task List being run, the SDWN_B pin must be

asserted a minimum of 900us prior to this catastrophic shutdown commencing. The nominal voltage of SDWN_B

is 0V when asserted, 1.8V when de-asserted.

USBRST_B

9.1.32

USBRST_B is an active low dedicated output signal to reset the USB PHY. The minimum pulse is 100µs when

asserted. The nominal voltage of USBRST_B is 0V when asserted, 1.8V when de-asserted.

GPIOs

9.1.33

9.1.33.1

Low Voltage GPIOs

GPIO0P1_BATIDIN:

Battery ID input signal from SOC for digital battery communication. Optional function multiplexed with low

voltage GPIO0P1

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