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DA6021 датащи(PDF) 49 Page - Renesas Technology Corp |
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DA6021 датащи(HTML) 49 Page - Renesas Technology Corp |
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49 / 225 page ![]() DA6021 HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR Company Confidential Data Sheet Version 3.A - Final 31-Jan-14 © 2014 Dialog Semiconductor GmbH 49 of 224 www.dialog-semiconductor.com Parameter Description Min [ms] Typ [ms] Max [ms] Measured [ms] T3 SLP_S0IX_B assertion to VCCAPWROK deassertion 0,000 0,008 0,016 0,001 T0_V1P2SX SLP_S0IX_B assertion to first SX rail starts to turn off 0,000 0,008 0,016 0,048 T1_V1P2SX Ramp-down time from 90% to 10% 0,1 1,00 2,00 0,608 T2_V1P0SX- V1P2SX Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,975 T1_V1P0SX Ramp-down time from 90% to 10% 0,1 1,00 2,00 0,01 T2_V1P2SX- VDDQ_VTT Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 1,053 T1_VDDQ_VTT Ramp-down time from 90% to 10% 0,1 1,00 2,00 0,619 T2_VDDQ_VTT- V1P05S Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,615 T1_V1P05S V1P05S S0 to S0IX Level transition 0,5 1,00 2,00 0,032 Table 19: Enter S0iX timing Exit SOC S0iX Mode 10.3.4 The S0IX state is exited when the SOC de-asserts the SLP_S0IX_B pin (HIGH). VDDQ_VTT and SX rails are turned on. The VCC rail will be turned on by SVID commands (not by SLP_S0IX). The rest of the rails will come out of power save mode. The rail sequencing is shown in the figure below: |
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