DA6021 datasheet(32/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

32 of 224

www.dialog-semiconductor.com

SoC Power States

9.3

The following diagram depicts the DA6021 power states, related to the SoC and the platform rails.

Figure 6: SoC Power States

State description:



SOC_S4: or hibernate. This is the most power saving from all the standby states. Content is saved onto disk.

DA6021 runs only with low frequency oscillator. All *_A power rails are active and in low power pulse

skipping mode



SOC_S3: or standby: Content is saved in the RAM. It requires more power than SOC_S4, although still

considered a low power state. DA6021 has a low power oscillator and in addition all *_U power rails are

switched on, running in pulse skipping mode. Temperature monitoring is in-active as power consumption is

low and no temperature event is expected. Furthermore the ADC is still disabled, reducing the idle power.



SOC_SX: a power saving active standby mode with very fast recovery time. High frequency oscillator is

active as well as all *_S power domains. Temperature supervision is active, but ADC runs on reduced

speed.



SOC_S0: This represents the active state for the SoC where most of the rails are on. SoC executes the code

and software plus operating system decide on power up/down of the “on-demand” power rails.

Generally the OTP and optionally the external EEPROM are read out only once during first power-up. However,

it will be possible via OTP/software to configure the sequencer to go again through the OTP and/or EEPROM

between some of the standby states as indicated in the figure above.

SOC_S0 State

9.3.1

In the “SOC S0 State”, DA6021 completed the bring-up of the platform, and released the SOC from reset. In this

state, the DA6021 state machines may be modified and controlled by the SOC, through commands issued over

the I2C and SVID interfaces.

In this state, the tablet

will appear “on” to the user.

The events causing a transition out of the ‘SOC S0’ state are shown in the table below.

SOC_G3

(SPD)

SOC_S4

SOC_S3

SOC_S0

(Active)

SOC_SX

Time

OTP

EPROM

Optional

(OTP/EPROM variant)

*_A rails

*_U rails

*_S rails

*_SX rails

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