AD4697BCPZ datasheet(88/107 Pages) AD

88 / 107 page

Data Sheet

AD4697/AD4698

APPLICATIONS INFORMATION

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Rev. 0 | 88 of 107

LAYOUT GUIDELINES

The following are suggested layout techniques for achieving optimal

performance of the AD4697/AD4698 populated on a PCB. An ex-

ample PCB layout with the 16-channel equivalent device (AD4696)

is provided in the user guide for the AD4696 evaluation board

(EVAL-AD4696FMCZ).

Analog traces (that is, traces connected to the analog inputs and

reference input) must be physically separated from the digital traces

(that is, traces to the CNV input, SPI, and general-purpose pins)

to limit cross coupling from fast switching digital signals into the

analog input signals. Add ground fill between analog and digital

traces on the same PCB layer. Do not cross digital traces over

the analog traces or the AD4697/AD4698 device without a ground

plane PCB layer in between. The analog and digital pins on the

AD4697/AD4698 are arranged to facilitate separation of analog and

digital traces.

The AD4697/AD4698 analog inputs (IN0 to IN7) have a dynam-

ic input impedance due to the multiplexer and ADC core input

switches, which toggle between conversions. An external capacitor

is recommended to reduce nonlinear voltage steps at the analog

inputs. Place these external capacitors as close to the analog

inputs as possible to minimize parasitic impedance between the

two, which could degrade performance. See the Analog Front-End

Design section for more information.

The AD4697/AD4698 voltage reference input, REF, also has a

dynamic input impedance. The effective impedance between the

reference drive circuitry output and the REF input must be very low,

and a decoupling capacitor must be placed as close to the REF

pin as possible. If the internal reference buffer is not used, connect

the external reference circuitry to the REF pin with wide traces to

minimize the trace impedance (see the Reference Circuitry Design

section).

The power supplies of the AD4697/AD4698 must be decoupled with

low effective series resistance (ESR) ceramic capacitors placed

close to the supply pins, and the supplies must be connected using

short, wide traces to provide low impedance paths and to reduce

the effect of glitches on the power supply lines (see the Power

Supplies section). If LDO_IN is powered from the same supply as

AVDD, short the pins with a wide common trace, and use a single

100 nF capacitor to decouple both pins.

The AN-617 Application Note has information on PCB layout and

assembly for the WLCSP.

EVALUATING AD4697/AD4698 PERFORMANCE

The AD4697/AD4698 evaluation tool offerings include a fully as-

sembled and tested evaluation board (EVAL-AD4696FMCZ) includ-

ing the 16-channel equivalent device (AD4696), evaluation software

for controlling the board from a PC, and support documentation

for the hardware and software. The evaluation software requires

the EVAL-SDP-CH1Z controller board to establish communication

between the PC and the EVAL-AD4696FMCZ board.

The EVAL-AD4696FMCZ board allows for prototyping the AFE cir-

cuitry and reference circuitry with the various digital features offered

by the AD4697/AD4698. It also features a standard 160-pin field-

programmable gate array (FPGA) mezzanine card (FMC) connector

and 12-pin extended SPI peripheral module (PMOD) connector that

allows prototyping communication between the on-board AD4696

and many third-party FPGA development boards.

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