ADN8835ACPZ-R7 datasheet(21/27 Pages) AD

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Data Sheet

ADN8835

Rev. B | Page 21 of 27

Inductor Selection

The inductor selection determines the inductor current ripple and

loop dynamic response. Larger inductance results in smaller

current ripple and slower transient response because smaller

inductance results in the opposite performance. To optimize the

performance, the trade-off must be made between transient

response speed, efficiency, and component size. Calculate the

inductor value with the following equation:

(

)

OUT

∆

–

where:

VSW_OUT is the PWM amplifier output.

fSW is the switching frequency (2 MHz by default).

∆IL is the inductor current ripple.

A 1 µH inductor is typically recommended to allow reasonable

output capacitor selection while maintaining a low inductor

current ripple. If lower inductance is required, a minimum

inductor value of 0.68 µH is suggested to ensure that the current

ripple is set to a value between 30% and 40% of the maximum

load current.

Except for the inductor value, the equivalent dc resistance (DCR)

inherent in the metal conductor is also a critical factor for

inductor selection. The DCR accounts for most of the power loss

on the inductor by DCR × IOUT2. Using an inductor with high

DCR degrades the overall efficiency significantly. In addition,

there is a conduct voltage drop across the inductor because of

the DCR. When the PWM amplifier is sinking current in cooling

mode, this voltage drives the minimum voltage of the amplifier

higher than 0.06 × VPVIN by at least tenth of millivolts. Similarly, the

maximum PWM amplifier output voltage is lower than 0.93 ×

VPVIN.

This voltage drop is proportional to the value of the DCR, and

reduces the output voltage range at the TEC.

When selecting an inductor, ensure that the saturation current

rating is higher than the maximum current peak to prevent sat-

uration. In general, ceramic multilayer inductors are suitable for low

current applications due to small size and low DCR. When the

noise level is critical, use a shielded ferrite inductor to reduce the

electromagnetic interference (EMI).

Table 7. Recommended Inductors

Vendor

Value

Device No.

Footprint (mm)

Coilcraft

1.0 μH ±

20%

XFL4020-102MEB

4.3 × 4.3

Murata

1.0 μH ±

20%

DFE252012P-1R0M

2.5 × 2.0

Capacitor Selection

The output capacitor selection determines the output voltage

ripple, transient response, as well as the loop dynamic response

of the PWM amplifier output. Use the following equation to

select the capacitor:

(

)

OUT

∆

)

(

–

Note that the voltage caused by the product of current ripple,

ΔIL, and the capacitor equivalent series resistance (ESR) also

add up to the total output voltage ripple. Selecting a capacitor

with low ESR can increase overall regulation and efficiency

performance.

Table 8. Recommended Output Capacitors

Vendor Value

Device No.

Footprint

(mm)

Murata

10 µF ±

10%, 10 V

ZRB18AD71A106KE01L

1.6 × 0.8

Murata

10 µF ±

20%, 10 V

GRM188D71A106MA73 1.6 × 0.8

Taiyo

Yuden

10 µF ±

20%, 10 V

LMK107BC6106MA-T

1.6 × 0.8

INPUT CAPACITOR SELECTION

On the PVIN pin, the amplifiers require an input capacitor

to decouple the noise and to provide the transient current to

maintain a stable input and output voltage. A 10 µF ceramic

capacitor rated at 10 V is the minimum recommended value.

Increasing the capacitance reduces the switching ripple that

couples into the power supply but increases the capacitor size.

Because the current at the input terminal of the PWM amplifier

is discontinuous, a capacitor with low effective series inductance

(ESL) is preferred to reduce voltage spikes.

In most applications, a decoupling capacitor is used in parallel

with the input capacitor. The decoupling capacitor is usually a

100 nF ceramic capacitor with very low ESR and ESL, which

provides better noise rejection at high frequency bands.

POWER DISSIPATION

This section provides guidelines to calculate the power

dissipation of the ADN8835. Approximate the total power

dissipation in the device by

PLOSS = PPWM + PLINEAR

where:

PPWM is the power dissipation in the PWM regulator.

PLOSS is the total power dissipation in the ADN8835.

PLINEAR is the power dissipation in the linear regulator.

PWM Regulator Power Dissipation

The PWM power stage is configured as a buck regulator and

its dominant power dissipation (PPWM) includes power switch

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