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ADN8835ACPZ-R7 датащи(PDF) 20 Page - Analog Devices

номер детали ADN8835ACPZ-R7
подробное описание детали  Ultracompact, 3 A Thermoelectric Cooler (TEC) Controller
PDF  27 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADN8835ACPZ-R7 датащи(HTML) 20 Page - Analog Devices

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ADN8835
Data Sheet
Rev. B | Page 20 of 27
Figure 35. Implementing a PID Compensation Loop
Figure 36. Bode Plot for PID Compensation
MOSFET DRIVER AMPLIFIERS
The ADN8835 has two separate MOSFET drivers: a switched
output or PWM amplifier, and a high gain linear amplifier. Each
amplifier has a pair of outputs that drive the gates of the internal
MOSFETs, which, in turn, drive the TEC as shown in Figure 33. A
voltage across the TEC is monitored via the SFB and LDR pins.
Although both MOSFET drivers achieve the same result, to
provide constant voltage and high current, their operation is
different. The exact equations for the two outputs are
VLDR = VB − 80(VOUT2 − 1.25 V)
VSFB = VLDR + 5(VOUT2 − 1.25 V)
where:
VOUT2 is the voltage at OUT2.
VB is determined by VVDD as
VB = 1.5 V for VVDD < 4.0 V
VB = 2.5 V for VVDD > 4.0 V
The compensation network that receives the temperature set voltage
and the thermistor voltage fed by the input amplifier determines
the voltage at OUT2. VLDR and VSFB have a low limit of 0 V and
an upper limit of VVDD. Figure 37, Figure 38, and Figure 39
show the graphs of these equations.
Figure 37. LDR Voltage vs. OUT2 Voltage
Figure 38. SFB Voltage vs. OUT2 Voltage
Figure 39. TEC Voltage (LDR – SFB) vs. OUT2 Voltage
PWM OUTPUT FILTER REQUIREMENTS
A Type III compensator internally compensates the PWM
amplifier. Because the poles and zeros of the compensator are
designed and fixed by assuming the resonance frequency of the
output LC tank is 50 kHz, the selection of the inductor and the
capacitor must follow this guideline to ensure system stability.
OUT1
IN2N
OUT2
PID COMPENSATOR
CHOPPER 2
IN2P
ADN8835
VTEMPSET
RI
RD
CD
CF
CI
RP
FREQUENCY
(Hz Log Scale)
0dB
1
2π × RICI
RP
RI
1
2π × RICD
1
2π × RPCI
1
2π × CD (RD + RI)
RP
RD || RI
OUT2 (V)
1.25
0.75
0.25
0
1.75
2.25
2.75
–2.5
2.5
7.5
0
5.0
VVDD = 3.3V
VVDD = 5.0V
OUT2 (V)
1.25
0.75
0.25
0
1.75
2.25
2.75
–2.5
2.5
7.5
0
5.0
VVDD = 3.3V
VVDD = 5.0V
–2.5
–5.0
0
2.5
5.0
OUT2 (V)
1.25
0.75
0.25
0
1.75
2.25
2.75
VVDD = 3.3V
VVDD = 5.0V



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