TMS320AV7110 datasheet(21/131 Pages) TI

21 / 131 page

DSP

TMS320AV7110

Revision 3.1

10/08/99 22:18

Page 21

Address

Content

Size *

Comments

CDFF FFFF

Reserved

CC40 0000

CC3F FFFF

Expansion Memory Region

(OSD/User Data)

2 MB

CC20 0000

CC1F FFFF

Audio Buffer

65,536 b

or 8 kB

CC1F E000

CC1F DFFF

Video Buffer

2,748,416 b or 335.5 kB **

CC1A A200

CC19 C1FF

OSD or other use

87,040 B

or 85 kB **

CC19 4E00

CC19 4DFF

B Frame

373,248 B or 364.5 kB

CC13 9C00

(0.6 Frame Size)

CC13 9BFF

Second Reference Frame

622,080 B or 607.5 kB

CC0A 1E00

CC0A 1DFF

First Reference Frame

622,080 B or 607.5 kB

CC00 A000

CC00 9FFF

Video Microcode

36,864 B

or 36 kB

CC00 1000

CC00 0FFF

Tables and FIFOs

3 kB

CC00 0400

* See Table 3

CC00 03FF

Pointers

1 kB

through Table 5

CC00 0000

* B = Bytes, b = Bits

** This is the default size and may vary based on the application

Figure 7. Default Memory Allocation of SDRAM (PAL)

The addresse range from 0xCC000000 to 0xCC000FFF contains decoded bitstream information, error

statistics and monitor information, and Commands and Flags that provide a communication channel

between the ARM CPU and the Video Decoder. The relative addresses for these locations are defined

in Table 3 through Table 5.

Table 3. Decoded Bitstream Information

Byte Address

Name

Usage

Sequence Header as defined in the ISO/IEC 13818-2

0x000C00

horizontal_size_value

0x000C04

vertical_size_value

0x000C08

aspect_ratio_information

0x000C0C

frame_rate_code

0x000C10

bit_rate_value

0x000C18

vbv_buffer_size_value

0x000C1C

constrained_parameters_flag

0x000C20

load_intra_quantizer_matrix

0x000C24

load_non_intra_quantizer_matrix

Sequence Extension as defined in the ISO/IEC 13818-2

0x000C60

profile_and_level_indication

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